Theoretical study of the influence of GaOx interfacial layer on the GaN/SiO2 interface property

Abstract

The spontaneous formation of a Ga-oxide (GaOx) intermediate layer at the GaN/SiO2 interface has been reported during the SiO2 deposition on the GaN substrate. In this study, we have performed first-principles calculations and unveiled atomic and electronic structures of the GaN/SiO2 interface with 1-nm thick GaOx intermediate layer. Our calculations show that the top-layer Ga atoms on the GaN side are terminated with the O atoms on the GaOx side, leading to the clean GaN/GaOx interface and the absence of the electronic state in the midgap region. However, strongly localized states, which are originated from O atoms lone-pair orbitals in the –GaOSi– local structures, emerge in the gap near the valence-band maximum of GaN. These in-gap states become hole traps in GaN MOS devices, leading to a degradation in device controllability and operational speed.

Impacts of post-deposition annealing on hole trap generation at SiO2/p-type GaN MOS interfaces

“…26,27) Several theoretical studies have proposed that the GaO x interlayer could be a potential origin of the hole trap. 28,29) Despite this progress, physical understanding of the hole trap is still lacking, and a gate dielectric formation process that can suppress hole trapping has not been established.…”