Theoretical and Experimental Investigation of the Voltage Ripple across Flying Capacitors in the Interleaved Buck Converter with Extended Duty Cycle

Abstract

The interleaved buck converter with an extended duty cycle is analyzed in terms of unexplored parasitic switching states that diminish the switch utilization and its safety due to high-magnitude charging and discharging currents. The analysis explains the origin of the states and their effects and demonstrates their correlation with the existing voltage ripple on flying capacitors. The article further demonstrates that the voltage ripple can no longer be arbitrarily chosen as parasitic states emerge whenever the ripple exceeds an identified critical value being equal to the twofold voltage drop on the diode. A simple design criterion for flying capacitance is proposed. For a limited set of battery-powered DC-DC converters, a solution permitting the use of smaller capacitance by adding an extra switch is proposed. The derived findings are verified using experimental and simulation results.

Efficiency Optimization in Multi-Branch Converters through Dynamic Control

“…It should be emphasized that both simulations and experimental results encompass the inclusion of the aforementioned diodes, and thus, the analysis takes these diodes into account. The diode's presence does not invalidate the subsequent analysis proposed herein, nor does it impact the validity of the simulation or experimental findings [19,[21][22][23][24][25][26][27].…”

“…Each electrical component that is denoted by the index P corresponds to the parasitic element within a practical model of the converter. In the context of electrical current, the first Kirchhoff's law, denoted as (3), is employed [21][22][23][24][25]28].…”

“…r DS(on) denotes the resistance of the MOSFET transistor when it is in the "on" state, while R Ln and L n represent the resistance and inductance of the primary inductor. V F signifies the voltage drop across a diode, R Pn2 is the resistance of the output conductor connected to the load, and V Z represents the load voltage [19,[23][24][25][28][29][30][31].…”

Voltage Balance Control Analysis of Three-Level Boost DC-DC Converters: Theoretical Analysis and DSP-Based Real Time Implementation

“…This is due to their ability to operate at high power ratings with higher efficiencies compared to Energies 2018, 11, 3073 2 of 15 conventional two-level topologies. They also provide other advantages such as low distortion of the output voltage and lower switching losses [2][3][4][11][12][13][14]. The three-level DC-DC boost converter (TLBDC) depicted in Figure 2a, has been widely discussed [14][15][16][17][18][19].…”

“…They also provide other advantages such as low distortion of the output voltage and lower switching losses [2][3][4][11][12][13][14]. The three-level DC-DC boost converter (TLBDC) depicted in Figure 2a, has been widely discussed [14][15][16][17][18][19]. The converter fundamentals and design considerations were presented in Reference [19], where it has been shown, for instance, that the converter inductance and capacitors can be significantly reduced when compared to the two-level boost DC-DC converter.…”