The use of residue number systems in the design of finite impulse response digital filters

Multiplier Design Utilizing Tri Valued Logic for RLNS Based DSP Applications

“…For binary logic based logarithmic conversion circuits with N b bit input, the corresponding 2N b bit antilogarithmic converter should be used [52], but in the case of TVL based design proposed (2N t − 1) trit antilogarithmic converter is appropriate. In order to compare 8 bit RLNS based multiplication design with TVL, N t has to be 6, as the value of (255) 10 is represented in ternary logic as (100110) 3 and the value of log 3 255 = 5.0438. Similarly in order to easily compare the simulation results obtained, 16 and 32 bit RLNS based multiplication scheme is compared with 11 and 21 trit designs.…”

“…As we compare 8 bit multiplication RLNS design with 6 trit TVL based scheme, the corresponding 11 trit logarithmic shifter is used for the antilogarithmic conversion process. But the multiplication of two 6 trit input operand can produce the maximum output value of (728) 10 × (728) 10 = (529984) 10 i.e., multiplication of (222222) 3 × (222222) 3 . Hence the circuit operation can be optimized to handle the maximum output value of a equivalent 16 bit value i.e., (255) 10 × (255) 10 = (65025) 10 .…”

“…Then the ternary logarithmic value of the maximum possible product value can be given as log 3 65025 = 10.0877. In order to prevent the value of the control input T′ to not exceed (101) 3 , which is the required maximum possible characteristic value, the adjusting variable (V) of (121) 3 is added with T and inverted to avoid unwanted shifting of the logarithmic shifter, i.e., ( )…”

“…The working of the proposed correction circuit can be explained from the example given as follows, (192) 10 = (021010) 3 , the actual ternary logarithmic value of log 3 (192) = 4.7855. By the proposed technique the value of the three MSTs are M 3 = 2, M 2 = 1 and M 1 = 0, this falls under the condition 1, which states that the mantissa value can be passed without any corrections as output from Om −2 -Om −6 , following the MST (M 3 ) as Om −1 i.e., (0.21010), thus the logarithmic value after identifying the characteristic part becomes, 4.7901.…”

“…For instance, (14) 10 is represented in binary values as (1110) 2 , the corresponding Mitchell's approximated logarithmic value is (11.110) 2 and its decimal value is 3.75 against the actual value of 3.8073. Similarly if the same logic is applied for ternary number (112) 3 (ternary value of 14), the ternary logarithmic value becomes (2.12) 3 with approximate decimal value (2.5555) 10 whose actual value is (2.4021) 10 . The ternary logarithmic values seems to be closer, but the actual antilogarithmic value becomes 16.56 (3 2.5555 ) for 14.…”