The TSV process in the hybrid pixel detector for the High Energy Photon Source

Zhang, Jie; Ye, Ding; Wei, Wei; Li, Hangxu; Li, Zhenjie; Ji, X. L.; Jing, Xiaoping; He, C. X.; Cao, Liqiang; Jiang, X. S.; Liu, Peng; Chen, Yuanbo

doi:10.1016/j.nima.2020.164425

Cited by 6 publications

(2 citation statements)

References 11 publications

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“…The HEPS-BPIX is expected to be utilized at most of the beamlines in HEPS, particularly for large molecule crystallography, Laue diffraction, and other synchrotron radiation applications that demand noise-free pixels and high pixel resolution. Up to now, the HEPS-BPIX detector has been undergoing iterative upgrades and transitions from single-threshold to dual-threshold functionality [1][2][3][4][5]. The system is required to handle a multitude of diverse types of information, and users have the capability to remotely connect to the detectors via independent software or a distributed control system.…”

Section: Heps-bpix Systemmentioning

confidence: 99%

A study of the latest updates of the readout system for the hybird-pixel detector at HEPS

Li,

Zhang,

Wei

et al. 2024

J. Inst.

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The High Energy Photon Source (HEPS) represents a fourth-generation light source. This facility has made unprecedented advancements in accelerator technology, necessitating the development of new detectors to satisfy physical requirements such as single-photon resolution, large dynamic range, and high frame rates. Since 2016, the Institute of High Energy Physics has introduced the first user-experimental hybrid pixel detector, progressing to the fourth-generation million-pixel detector designed for challenging conditions, with the dual-threshold single-photon detector HEPS-Beijing PIXel (HEPS-BPIX) set as the next-generation target. HEPS-BPIX will employ the entirely new Application-Specific Integrated Circuit (ASIC) BP40 for pixel information readout. Data flow will be managed and controlled through readout electronics based on a two-tier Field-Programmable Gate Array (FPGA) system: the Front-End Electronics (FEE) and the Input-Output Board (IOB) handle the fan-out for 12 ASICs, and the μ4FCP is tasked with processing serial data on high-speed links, transferring pixel-level data to the back-end RTM and μTCA chassis, or independently outputting through a network port, enabling remote control of the entire detector. The new HEPS-BPIX firmware has undergone a comprehensive redesign and update to meet the electronic characteristics of the new chip and to improve the overall performance of the detector. We provide an overview of the core subunits of HEPS-BPIX, emphasizing the readout system, evaluating the new hardware and firmware, and highlighting some of its innovative features and characteristics.

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Section: Heps-bpix Systemmentioning

confidence: 99%

A study of the latest updates of the readout system for the hybird-pixel detector at HEPS

Li,

Zhang,

Wei

et al. 2024

J. Inst.

Self Cite

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“…These include single-photon avalanche diode 3D integration on CMOS [1] [2], 3D integration of Medipix and Timepix [3], TSV insertion into existing chips, X-Ray imaging [4]. and several others [5] [6]. The Timepix 4 collaboration has recently demonstrated a 4-side buttable chip utilizing TSVs to achieve >99.5% active area in a bump-bonded array [7].…”

Section: Foreseen Applications For 3d Integrationmentioning

confidence: 99%

Integration and Packaging

Mazza,

Lipton,

Patti

et al. 2022

Preprint

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Vertically integrated (3D) combinations of sensors and electronics provide the ability to fabricate small, fine pitch pixels with very small total capacitance monolithically integrated with complex circuitry. The small capacitance, enabled by the fine pixel pitch and low interconnect capacitance available in 3D hybrid bonding, provides excellent signal/noise with moderate power. This combination enables fabrication of integrated sensors and electronics with both excellent position and time resolution. In this white paper a discussion will be presented on 3D integration advantages, ongoing projects and prospects in high energy physics and beyond.

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The development and application of the test system for the silicon pixel modules in HEPS-BPIX

Zhang

Wei

et al. 2020

Radiat Detect Technol Methods

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The TSV process in the hybrid pixel detector for the High Energy Photon Source

Cited by 6 publications

References 11 publications

A study of the latest updates of the readout system for the hybird-pixel detector at HEPS

A study of the latest updates of the readout system for the hybird-pixel detector at HEPS

Integration and Packaging

The development and application of the test system for the silicon pixel modules in HEPS-BPIX

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