The Strong Degradation of 30 Å Gate Oxide Integrity Contaminated by Copper

Abstract

A much higher leakage current, a lower breakdown effective field, a poorer charge-to-breakdown, and worse stress-induced leakage current are observed in ultrathin 30 Å oxides even at a low Cu contamination of 10 ppb. The strong degradation of the ultrathin gate oxide integrity can be explained by the tunneling barrier lowering and the increased interface trap tunneling due to the presence of Cu in the oxide and at the oxide-Si interface.Cu contamination 1-7 has attracted much attention in advanced high-speed complementary metal oxide semiconductors ͑CMOS͒ circuits using Cu metallization. The Cu contamination, which may come from either the front surface Cu interconnects or the back-side surface contaminated by the Cu process, may precipitate at the Si/SiO 2 interface 5,7,8 or form a silicide by a reaction with Si. The Cu contamination can degrade metal oxide field effect transistor's ͑MOSFETs͒ performance by increasing the leakage current at the source-drain junction, shifting the threshold voltage, and increasing the subthreshold swing. 8,9 The Cu contamination may also degrade the gate oxide integrity by reducing the breakdown electric field at high contamination levels, 2 but has little effect on the gate area oxide breakdown at low contamination levels. 1 However, most of the reported Cu contamination studies are focused on relatively thick oxides. In this paper, we have examined the gate oxide integrity 10-12 of Cu-contaminated ultrathin ϳ30 Å oxides used for an 0.18 m generation. In contrast to previous reports on thick oxides, we have found severe degradation of the gate oxide integrity for these ultrathin ϳ30 Å oxides. Compared with the control sample, the contaminated oxides show higher direct and Fowler-Nordheim ͑F-N͒ tunneling currents, lower breakdown electric field, poorer charge-to-breakdown distribution (Q BD ), and worse stress-induced leakage current ͑SILC͒, even at a low Cu contamination level of 10 ppb. This is probably due to the presence of Cu within both the oxide and the Si-oxide interface, which effectively lowers the tunneling barrier and increases the SILC. ExperimentalStandard 4 in. p-type Si ͑100͒ wafers with a typical resistivity of ϳ10 ⍀ cm were used in this study. The preoxidation cleaning of the wafers was performed by a modified RCA clean, followed by HF dipping, and spin drying. Device isolation was formed by growing and patterning the 3000 Å thick field oxide. Then the ϳ30 Å gate oxide was grown at 900°C in dry oxygen diluted with nitrogen. The oxide thickness was measured by ellipsometry and high frequency C-V measurements under accumulation. The gate electrode was formed by depositing a 3000 Å poly-Si with subsequent phosphorus doping by POCl 3 . The standard aluminum contact was formed by thermal evaporation, and MOS capacitors of 100 ϫ 100 m were fabricated. The Cu contamination was introduced by dipping the devices for 1 min into a CuSO 4 solution with a concentration of 10 ppb or 10 ppm, and the contaminated wafer was then annealed at 400°C in a nitrogen gas ambient. Figur...

The Copper Contamination Effect of Al[sub 2]O[sub 3] Gate Dielectric on Si

“…In sharp contrast, only slightly increasing leakage current at lowest 0.5 V bias can be observed in the 4.2 nm Al 2 O 3 ͑1.9 nm EOT͒. This increasing leakage current in the pretunneling region at low voltage is also previously observed in thick 5.0 nm SiO 2 and oxynitride with 16% N content, [10][11][12] which is attributed to the trapassisted tunneling originated by neutral traps formed by Cu inside the oxide matrix. It is noticed that although the degradation of pretunneling leakage current is negligible for the 3.6 nm oxynitride with 23% N, the Al 2 O 3 still has strong advantage of much smaller EOT of only 1.9 nm than the 3.0 nm EOT oxynitride ͑23% N͒.…”

“…A more detailed Cu contamination process and discussion of degradation on gate dielectric integrity of SiO 2 and SiON can be found in our previous publications. [10][11][12] The Cu contamination effect was studied by current-density and voltage ͑J-V͒ measurements in high-Al 2 O 3 gate dielectric MOS capacitors. Figure 1 shows the J-(V G -V FB ) characteristics of Al 2 O 3 gate capacitors with ϳ4.2 nm physical thickness ͑1.9 nm EOT͒, where the V FB is the flatband voltage obtained from the C-V measurement and quantum mechanical calculation.…”

Cu Contamination Effect in Oxynitride Gate Dielectrics

“…More details on the Cu contamination process can be found in our previous publications. 6,7 Standard current-voltage ͑I-V͒ and C-V measurements were used to investigate the electrical property changes caused by the Cu contamination. The oxygen and nitrogen content in the oxynitride gate dielectric was measured by X-ray photoelectron spectroscopy ͑XPS͒.…”

Reaction of cyanide ions with copper on Si surfaces and its use for Si cleaning

“…Since a minute concentration of Cu seriously degrades the device characteristics, i.e., decreasing the minority carrier diffusion length [3] and the minority carrier life time [4,5], increasing the interface state density [6] and surface roughness [7,8],…”