The state-of-the-art in semiconductor reverse engineering

Torrance, R.; James, Dick

doi:10.1145/2024724.2024805

Cited by 236 publications

(113 citation statements)

References 5 publications

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“…Indeed, obfuscation techniques aim to increase reverseengineering time. The time is at least linear with the area [10]. Increasing the area increases the time needed for reverse engineering.…”

Section: Logic Obfuscationmentioning

confidence: 99%

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Logic Modification-Based IP Protection Methods: An Overview and a Proposal

Colombier

Bossuet

Hély

2017

Foundations of Hardware IP Protection

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Intellectual property protection is a major concern for fabless IC designers. Among the proposed protection means, the active ones are preventing counterfeiting and over-usage to occur in the first place. One of the solution to implement an active design data protection scheme is to modify the combinational logic. Several methods are available, called logic encryption, logic obfuscation, logic masking or logic locking. A formal framework is first provided for these notions. We clearly define those four types of logic modification, and give didactic examples. Then, a new method to achieve logic locking is presented. This method, based on graph analysis, allows to select the insertion sites for the extra gates orders of magnitudes faster than existing techniques. We give experimental results following from a practical implementation and discuss design considerations about integration in an overall, more robust, protection scheme. We also consider existing attacks and propose some countermeasures.

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Section: Logic Obfuscationmentioning

confidence: 99%

“…The correct unlocking key k is found by using the laws in (10), and considering the type of inserted gate. As a didactic example, let us consider the following 3-input Boolean function f {0, 1} 3 → {0, 1} 1 :…”

Section: Logic Lockingmentioning

confidence: 99%

Logic Modification-Based IP Protection Methods: An Overview and a Proposal

Colombier

Bossuet

Hély

2017

Foundations of Hardware IP Protection

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“…The small logical resources requirement of the proposed spy circuitry makes reverse engineering it harder, although not impossible [32]. Even with recent CMOS technologies, the attacker can reverse engineer ICs using a scanning electron microscope and an automatic tool for circuitry extraction [32], [33]. Nevertheless, the smaller the piece of hardware used for BFSK transmitter the harder it is to detect during reverse engineering.…”

Section: Number_ftiles = N + K + 2 (I)mentioning

confidence: 99%

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

Bossuet¹,

Bayon²,

Fischer³

2016

VLSI-SoC: Design for Reliability, Security, and Low Power

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International audienceOver the past 10 years, the designers of intellectual properties(IP) have faced increasing threats including cloning, counterfeiting, andreverse-engineering. This is now a critical issue for the microelectronicsindustry. The design of a secure, efficient, lightweight protection scheme fordesign data is a serious challenge for the hardware security community. In thiscontext, this chapter presents two ultra-lightweight transmitters using sidechannel leakage based on electromagnetic emanation to send embedded IPidentity discreetly and quickl

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“…The reverse engineering is the discipline that combines all of the techniques and tools related to the understanding of an existent software system (or equipment) [1]. Its goal is to recover the design model in order to recreate the abstraction model from the source of information (physical schema of data source, source code, documentation,).…”

Section: Introductionmentioning

confidence: 99%

RDB2 Model: A Relational Databases Retro-Design Tool Enriched by the Extraction of Constraints

Jakjoud¹,

Bahaj²

2017

JSW

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Abstract:In this paper, we present a method that retro-designs a relational database to generate a conceptual model by extracting data structures and constraints: Our method extracts a conceptual model directly from an existing relational database without using the ER model (Entity / Relationship). The method is proposed as a two-step process, the first is to extract the data structure of the relational database and the conceptualization of this data structure by generating a conceptual model. The second stage involves the extraction of relational constraints and the semantic enrichment of the conceptual model by improving the understanding of relationships between data structures.

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The state-of-the-art in semiconductor reverse engineering

Cited by 236 publications

References 5 publications

Logic Modification-Based IP Protection Methods: An Overview and a Proposal

Logic Modification-Based IP Protection Methods: An Overview and a Proposal

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

RDB2 Model: A Relational Databases Retro-Design Tool Enriched by the Extraction of Constraints

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