Abstract:IEEE PI596, the Scalable Coherent Interface (formerly known as SupcrBus) is based on experience sained while developing Fastbus (ANSI/IEEE 960-1986, IEC 935), FuUirebus (IEEE P896.x) and outer modem 32-bit buses. SCI goals include a minimum bandwidth of 1 GByte/sec per processor in multiprocessor systems with thousands of processors; efficient support of a coherent disrributed-cache image of distributed shared memory; support for repeaters which interface to existing or future buses; and support for inexpensiv… Show more
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