Abstract:<div>Size reduction of the barrier and liner stack for copper interconnects is a major bottleneck in further down-scaling of transistor devices. The role of the barrier is to prevent diffusion of Cu atoms into the surrounding dielectric, while the liner (also referred to as a seed layer) ensures that a smooth Cu film can be electroplated. Therefore, a combined barrier+liner material that restricts the diffusion of Cu into the dielectric and allows for copper electro-deposition is needed. In this paper, … Show more
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