The Power-optimised Software Envelope

Abstract

Advances in processor design have delivered performance improvements for decades. As physical limits are reached, refinements to the same basic technologies are beginning to yield diminishing returns. Unsustainable increases in energy consumption are forcing hardware manufacturers to prioritise energy efficiency in their designs. Research suggests that software modifications may be needed to exploit the resulting improvements in current and future hardware. New tools are required to capitalise on this new class of optimisation. In this article, we present the Power Optimised Software Envelope (POSE) model, which allows developers to assess the potential benefits of power optimisation for their applications. The POSE model is metric agnostic and in this article, we provide derivations using the established Energy-Delay Product metric and the novel Energy-Delay Sum and Energy-Delay Distance metrics that we believe are more appropriate for energy-aware optimisation efforts. We demonstrate POSE on three platforms by studying the optimisation characteristics of applications from the Mantevo benchmark suite. Our results show that the Pathfinder application has very little scope for power optimisation while TeaLeaf has the most, with all other applications in the benchmark suite falling between the two. Finally, we extend our POSE model with a formulation known as System Summary POSE-a meta-heuristic that allows developers to assess the scope a system has for energy-aware software optimisation independent of the code being run. CCS Concepts: • Computing methodologies → Modeling and simulation; Model development and analysis; Modeling methodologies; • Hardware → Power and energy; Power estimation and optimization;

Analysis of Energy Consumption of Software Development Process Entities

“…The authors focused on adjusting the hardware components' performance according to the discovered design patterns in an application. A similar research on the runtime optimization of HPC applications was performed by Roberts et al [9]. They developed the POSE model that allows developers to compare the potential benefits of power and runtime optimization and determine which approach is most suitable for their code.…”

FPGA‐based HPC accelerators: An evaluation on performance and energy efficiency

“…One of the limitations of simple energy‐efficiency studies is that the reader is left trying to balance performance against energy. Ultimately these both translate into cost which, with sufficient parameters, the Energy Delay Sum and Energy Delay Distance 25 provide actionable guidance to programmers and procurement teams. As the subtleties of DOE procurement pricing, bulk energy pricing, power infrastructure upgrades, and costs associated with supporting multiple architectures are beyond the scope of this article, we will focus on performance and energy and leave it to the reader to weight and combine these terms to suit their needs.…”

Performance and Energy Assessment of a Lattice Boltzmann Method Based Application on the Skylake Processor

“…We focus on this part by measuring the improvement when using highly optimized data layouts in term of energy consumption (Joule) as well as in term of the average power absorbed (Watt) by the application. There are several metrics used to quantify energy efficiency of software applications for high-performance computing [10,11] offering a wide spectrum of options for a quantitative analysis. In this work, we consider more common quantities such as average power drain, time-to-solution and energy-to-solution [12].…”