The Power of Computation-in-Memory Based on Memristive Devices

Abstract

Conventional computing architectures and the CMOS technology that they are based on are facing major challenges such as the memory bottleneck making the memory access for data transfer a major killer of energy and performance. Computation-in-memory (CIM) paradigm is seen as a potential alternative that could alleviate such problems by adding computational resources to the memory, and significantly reducing the communication. Memristive devices are promising enablers of a such CIM paradigm, as they are able to support both storage and computing. This paper shows the power of memristive device based CIM paradigm in enabling new efficient applicationspecific architectures as well as efficient implementations of some known domain-specific architectures. In addition, the paper discusses the potential applications that could benefit from such paradigm and highlights the major challenges.

Dealing with Non-Idealities in Memristor Based Computation-In-Memory Designs

“…Memristor-based CIM has many features that make it feasible to realize ultra-low power and energy-efficient computing [6,20]:…”

“…• Practically zero leakage computing [20]: The nonvolatile nature of the resistive devices enables CIM to maintain the stored values in a leakage free manner when it is not operating, which solves the leakage bottleneck of SRAM-based architectures. • Massive parallelism [6]: CIM provides high parallelism as typically all columns in a crossbar can be accessed 978-1-6654-9005-4/22/$31.00 ©2022 IEEE Fig.…”

“…• Near zero data bandwidth requirement [21]: Integration of storage and computation in the same physical location circumvents the bandwidth bottleneck associated with the traditional computation centered systems, which need significant data movement between the memory and processing units. • Extremely energy-efficient computing [20]: The combination of non-volatility (near zero leakage), parallelism and near zero bandwidth enables CIM to offer extremely energy-efficient computing, in the order of fJ per operation, when compared to the existing solutions as shown in Figure 2.…”