The performance impact of kernel prefetching on buffer cache replacement algorithms

Butt, Ali R.; Gniady, Chris; Hu, Y. Charlie

doi:10.1145/1071690.1064231

Cited by 38 publications

(58 citation statements)

References 29 publications

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“…Various kernel components on the path from file system Operations to the disk by et. al [2] figure 2 File System accesses through various kernel subsystems. Firstly it accesses the buffer cache which contains two units, the main cache unit and prefetch unit.…”

Section: Algorithmmentioning

confidence: 99%

A Modified Algorithm for Buffer Cache Management

Chaudhary¹,

Kumar²,

Rai³

et al. 2011

IJCA

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A fundamental challenge in improving file system performance is to design effective block replacement algorithms to minimize buffer cache misses. In this paper an algorithm is proposed for buffer cache management with prefetching. The buffer cache contains two units, the main cache unit and prefetch unit. The sizes of both the units are fixed. The total sizes of both the units are a constant. Blocks are fetched in one block look ahead prefetch principle. The block placement and replacement policies are defined. The replacement strategy depends on the most recently accessed block and the defined miss count percentage or hit count percentage of the blocks. FIFO algorithm is used for the prefetch unit. KEYWORDSBuffer cache management, prefetching, data access. File systems management, operating systems performance.

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Section: Algorithmmentioning

confidence: 99%

A Modified Algorithm for Buffer Cache Management

Chaudhary¹,

Kumar²,

Rai³

et al. 2011

IJCA

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“…Page replacement algorithms decide a way of managing a full undivided memory cache space. The most prevalent page replacement policies include the Least Recently Used (LRU) policy, the Most Recently Used (MRU) policy, the Least Frequently Used (LFU) policy, and the First In First Out (FIFO) policy [1], [7]. For example, the current GNU/Linux kernel uses a simple LRU replacement policy to manage its cache.…”

Section: Related Workmentioning

confidence: 99%

“…The prefetch buffer and cache buffer for a storage system are using different hypotheses about I/O access patterns. Many management schemes have been developed to control these two different types of buffer-cache partitions [1], [2], [6], [9], [10], [11], [16], [17].…”

Section: Related Workmentioning

confidence: 99%

An automatic prefetching and caching system

Lewis

Alghamdi

Assaf

et al. 2010

International Performance Computing and Communications Conference

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Abstract-Steady improvements in storage capacities and CPU clock speeds intensify the performance bottleneck at the I/O subsystem of modern computers. Caching data can efficiently short circuit costly delays associated with disk accesses. Recent studies have shown that disk I/O performance gains provided by a cache buffer do not scale with cache size. Therefore, new algorithms have to be investigated to better utilize cache buffer space. Predictive prefetching and caching solutions have been shown to improve I/O performance in an efficient and scalable manner in simulation experiments. However, most predictive prefetching algorithms have not yet been implemented in realworld storage systems due to two main limitations: first, the existing prefetching solutions are unable to self regulate based on changing I/O workload; second, excessive number of unneeded blocks are prefetched. Combined, these drawbacks make predictive prefetching and caching a less attractive solution than the simple LRU management. To address these problems, in this paper we propose an automatic prefetching and caching system (or APACS for short), which mitigates all of these shortcomings through three unique techniques, namely: (1) dynamic cache partitioning, (2) prefetch pipelining, and (3) prefetch buffer management. APACS dynamically partitions the buffer cache memory, used for prefetched and cached blocks, by automatically changing buffer/cache sizes in accordance to global I/O performance. The adaptive partitioning scheme implemented in APACS optimizes cache hit ratios, which subsequently accelerates application execution speeds. Experimental results obtained from trace-driven simulations show that APACS outperforms the LRU cache management and existing prefetching algorithms by an average of over 50%.

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“…The request is finally returned to the user (Step 6). A loaded application is then advertised to other nodes (7,8,9).…”

Section: Designmentioning

confidence: 99%

Mitigating disk energy management delays by exploiting peer memory

Wang

Butt

Gniady

2009

2009 IEEE International Symposium on Modeling, Analysis &Amp; Simulation of Computer and Telecommunication Systems

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Abstract-Modern enterprises employ hundreds of workstations for daily business operations, which consume a lot of energy and thus have significant operating costs. To reduce such costs, dynamic energy management is often employed. However, dynamic energy management, especially that for disks, introduces delays when an accessed disk is in a low power state and needs to be brought into active state. In this paper, we propose System-wide Alternative Retrieval of Data (SARD) that exploits the large number of machines in an enterprise environment to transparently retrieve binaries from other nodes, thus avoiding access delays when the local disk is in a low power mode. SARD uses a software-based approach to reduce spin-up delays while eliminating the need for major operating system changes, custom buffering, or shared memory infrastructure.

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The performance impact of kernel prefetching on buffer cache replacement algorithms

Cited by 38 publications

References 29 publications

A Modified Algorithm for Buffer Cache Management

A Modified Algorithm for Buffer Cache Management

An automatic prefetching and caching system

Mitigating disk energy management delays by exploiting peer memory

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