The ParaWise Expert Assistant – Widening Accessibility to Efficient and Scalable Tool Generated OpenMP Code

Johnson, S. P.; Evans, E. W.; Jin, Haoqiang; Ierotheou, C. S.

doi:10.1007/978-3-540-31832-3_7

Cited by 13 publications

(7 citation statements)

References 11 publications

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“…al. [23]. Nonetheless, the method for automatic conversion of the code or the process for manual conversion of the codes can be argued under the circumstance of developer's knowledge on parallelization or the complexity of the process for manual and automatic process respectively.…”

Section: Outcome From the Parallel Researchesmentioning

confidence: 99%

A framework for conversion of serial programming paradigm into parallel using architecture independent factors

2017

IJLTET

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INTRODUCTIONThe variation of the performance for a same code model during different hardware architecture is majorly caused by the hardware support such as preloading and probabilistic execution of the hardware. For a same input data set, the execution time varies in different runs [1]. Nevertheless these variations are random and cannot be predicted, thus resulting into variable performance benchmarks. Thus a proper model of converting the serial programming models into a parallel code model is highly desired to ensure constant performance and improvements in the performance. In the last few years, a significant number of researches are been carried out. The outcomes of those researchers are argued based on the viability of the performance. The works are depended on the types of the architecture and bound by the architectural advantages. Other research dimensional limitations observed in the parallel research outcomes are measures of the performance improvements. Mostly the outcomes have demonstrated arithmetic average of the performances and demonstrated the improvements, thus resulting into a demand for higher order and accurate analysis. The higher order of analysis is demonstrated by a few researchers considering the normalized architectural effects on the performance. The significant work by A. R. Alameldeenet. al.[1] and T. Kaliberaet. al. [2] has demonstrated the techniques to reduce the effects of hardware acceleration and other factors to identity the normalized performance measures of the programming models. Another notable work by T. Chenet. al. [3] demonstrate the use of non-parametric testing for a similar code model on various architectures and demonstrated the threshold to be considered for reducing the hardware effects on the analysis. Yet another leading research outcome by A. Georgeset. al. [4] considers the visual analysis of the performances which can be a newer direction in measuring the performances. The analysis of the hardware performance and influence of the hardware on the parallel programming models are hard to detect and the designers of the computer architectural models are sometimes clueless in terms of the factors to be improved to improve the performance of the parallel models. The work by D. J. Liljaet. al.[5] made a significant metric for dependent performance analysis of the hardware to detect the factors influencing the computational performances. Also, the work by S. Krishnamurthiet. al.[6] considerably explains the fact that programming models dependency on the hardware is strong. Nevertheless, with the understanding of that the existence of the factors influencing the performances of the programming model, the

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Section: Outcome From the Parallel Researchesmentioning

confidence: 99%

A framework for conversion of serial programming paradigm into parallel using architecture independent factors

2017

IJLTET

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“…One is allowing programmers to add "hints" to their programs to guide compiler parallelization, such as HPF for distributed memory systems and OpenMP or OpenHMPP [2] for shared memory systems. Another one is building an interactive system between programmers and parallelizing tools/compilers such as Vector Fabrics' Pareon [9], SUIF Explorer [21], the Polaris compiler [3], and ParaWise [15]. Hardware-supported speculative multithreading is also an easier approach for automatic parallelization.…”

Section: Related Workmentioning

confidence: 99%

Development of an Algorithm for Extracting Parallelism and Pipeline Structure from Stream-based Processing flow with Spanning Tree

Yamagiwa

Wang

Wada

2015

IJNC

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It is a fashion to use the manycore accelerators to promote the computing power in a computing platform. Especially GPU is one of the main series of the high performance computing, which is also employed by top supercomputers in the world. Programming methods on such accelerators includes development of control programs which accelerators executes to schedule the invocation of the accelerator's kernel program. The kernel program needs to be written based on the stream computing paradigm. Connecting I/Os of the kernel programs, we can develop a large application. When we consider the processing flow as a directed graph, we can implement a GUI-based programming tool for the accelerators. It visualizes a pipeline-based processing flow. However, it is very hard to find a starting point of a complex processing flow. Moreover, although the processing pipeline include the potential parallelism, it is hard for the programmer to exploit it intuitively. This paper proposes an algorithm applying the spanning tree that mechanically exploits the parallelism and determines an execution order. To verify the algorithm, this paper performs evaluation with realistic applications. The algorithm exploits effectively the parallelism and construct the optimal pipeline processing flow.

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“…Sophisticated interactive environments have also been created to integrate user knowledge (e.g. SUIF Explorer [20], Polaris [6] and Parawise [13]). However, to the best of our knowledge, current parallelizing compilers and tools largely focus on Fortran and/or C applications.…”

Section: Related Workmentioning

confidence: 99%

“…Programmers can use OpenMP to express parallelization opportunities and strategies for applications. Moreover, the simple API provided by OpenMP has attracted parallelizing compilers and tools [5,13] to use OpenMP as a target for interactive or automatic parallelization.…”

Section: Introductionmentioning

confidence: 99%

Semantic-Aware Automatic Parallelization of Modern Applications Using High-Level Abstractions

Liao

Quinlan

Willcock

et al. 2010

Int J Parallel Prog

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Automatic introduction of OpenMP for sequential applications has attracted significant attention recently because of the proliferation of multicore processors and the simplicity of using OpenMP to express parallelism for shared-memory systems. However, most previous research has only focused on C and Fortran applications operating on primitive data types. Modern applications using high-level abstractions, such as C++ STL containers and complex user-defined class types, are largely ignored due to the lack of research compilers that are readily able to recognize highlevel object-oriented abstractions and leverage their associated semantics. In this paper, we use a source-to-source compiler infrastructure, ROSE, to explore compiler techniques to recognize high-level abstractions and to exploit their semantics for automatic parallelization. Several representative parallelization candidate kernels are used to study semantic-aware parallelization strategies for high-level abstractions, combined with extended compiler analyses. Preliminary results have shown that semantics of abstractions can help extend the applicability of automatic parallelization to modern applications and expose more opportunities to take advantage of multicore processors.

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The ParaWise Expert Assistant – Widening Accessibility to Efficient and Scalable Tool Generated OpenMP Code

Cited by 13 publications

References 11 publications

A framework for conversion of serial programming paradigm into parallel using architecture independent factors

A framework for conversion of serial programming paradigm into parallel using architecture independent factors

Development of an Algorithm for Extracting Parallelism and Pipeline Structure from Stream-based Processing flow with Spanning Tree

Semantic-Aware Automatic Parallelization of Modern Applications Using High-Level Abstractions

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