The Minimization of TANT Networks

Gimpel, James F.

doi:10.1109/pgec.1967.264603

Cited by 40 publications

(11 citation statements)

References 11 publications

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“…Exact solutions are presented in Grasselli and Luccio [1965] and in Brayton and Somenzi [1989] using branch-and-bound search. Heuristic methods have also been proposed, e.g., Grasselli and Luccio [1965]; Gimpel [1967]; and Rudell [1989]. Recent work by Coudert [1996] has significantly improved the efficiency of earlier exact methods.…”

Section: Set Coveringmentioning

confidence: 99%

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A text-compression-based method for code size minimization in embedded systems

Liao

Devadas

Keutzer

1999

ACM Trans. Des. Autom. Electron. Syst.

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We address the problem of code-size minimization in VLSI systems with embedded DSP processors. Reducing code size reduces the production cost of embedded systems.We use data-compression methods to develop code-size minimization strategies. In our framework, the compressed program consists of a skeleton and a dictionary. We show that the dictionary can be computed by solving a set-covering problem derived from the original program. To execute the compressed code, we describe two methods that have different performance characteristics and different degrees of freedom in compressing the code. We also address performance considerations, and show that they can be incorporated easily into the set-covering formulation, and present experimental results obtained with Texas Instruments' optimizing TMS320C25 compiler.

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Section: Set Coveringmentioning

confidence: 99%

“…We briefly describe the notions of essentiality and dominance. The reader is referred to Gimpel [1967] andRudell [1989] for additional reduction techniques.…”

Section: Set Coveringmentioning

confidence: 99%

A text-compression-based method for code size minimization in embedded systems

Liao

Devadas

Keutzer

1999

ACM Trans. Des. Autom. Electron. Syst.

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“…In particular, the synthesis methods such as Sum-of-Products networks (SOP), Product-of-Sums (POS), TANT and NAND networks [6,7,8,21], linear, bidecomposition [19], Ashenhurst-Curtis decomposition [1], Reed-Muller, Exclusive-Or-Sum-of_Products (ESOP) [20] and negative gate circuit [9] synthesis methods can be adopted. We have been initially comparing them on several types of single-output functions such as unate functions, parity functions and affine functions of many variables, cyclic functions, non-cyclic, balanced and self-dual functions.…”

Section: Logic Synthesis To Minimize the Delay In Memristor Networmentioning

confidence: 99%

Logic synthesis and a generalized notation for memristor-realized material implication gates

Raghuvanshi¹,

Perkowski²

2014

2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

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The paper presents new logic synthesis methods for single-output incomplete multi-level binary circuits using Memristor-based material implication gates. The first method follows Lehtonen's assumption of using only two working memristors. The algorithm minimizes the number of implication (IMPLY) gates, which corresponds to minimizing the number of pulses or the delay time. This greedy search method uses essential and secondary essential primes, does not require solving the covering problem, is fast, and produces high quality results. We compare it to other synthesis methods, such as the modified SOP and Exclusive-Or Sum of Products (ESOP) with minimum number of working memristors. We analyze the problem of reduction in IMPLY gate count by adding more working memristors and introduce Imply Sequence Diagrams, a new notation, similar to one used in reversible logic.

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“…Exact solutions are given in Brayton and Somenzi [1989] and Grasselli and Luccio [1965]. Heuristic methods have been given in Gimpel [1967] and Grasselli and Luccio [1965]. Coudert [1997] has improved the efficiency of an exact solver by incorporating a new lower-bounding and pruning technique known as the "limit lower-bound."…”

Section: Binate Coveringmentioning

confidence: 99%

A new viewpoint on code generation for directed acyclic graphs

Liao

Keutzer

Tjiang

et al. 1998

ACM Trans. Des. Autom. Electron. Syst.

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We present a new viewpoint on code generation for directed acyclic graphs (DAGs). Our formulation is based on binate covering, the problem of satisfying, with minimum cost, a set of disjunctive clauses, and can take into account commutativity of operators and of the machine model. An important contribution of this work is a set of necessary and sufficient conditions for a valid schedule to be derived, based on the notion of worms and worm-partitions. This set of conditions can be compactly expressed with clauses that relate scheduling to code selection. For the case of one-register machines, we can derive clauses that lead to generation of optimal code for the DAG. Recent advances in exact binate covering algorithms allow us to use this strategy to generate optimal code for large basic blocks. The optimal code generated by our algorithm results in significant reductions in overall code size.

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The Minimization of TANT Networks

Cited by 40 publications

References 11 publications

A text-compression-based method for code size minimization in embedded systems

A text-compression-based method for code size minimization in embedded systems

Logic synthesis and a generalized notation for memristor-realized material implication gates

A new viewpoint on code generation for directed acyclic graphs

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