2007
DOI: 10.1134/s0005117907010146
|View full text |Cite
|
Sign up to set email alerts
|

The method of parallel-sequential built-in self-testing in integrated circuits of the type SFPGAS

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2007
2007
2013
2013

Publication Types

Select...
3
1

Relationship

1
3

Authors

Journals

citations
Cited by 4 publications
(1 citation statement)
references
References 7 publications
0
1
0
Order By: Relevance
“…-detection of 100% of the traditional-single and multiple, stuck-at and logical, short circuiting and breaks that do not extend the set of inputs of the element-faults and almost all nontraditional-extending the number of input elements-faults, see [10];…”
Section: Testable Architecture For Self-testingmentioning
confidence: 99%
“…-detection of 100% of the traditional-single and multiple, stuck-at and logical, short circuiting and breaks that do not extend the set of inputs of the element-faults and almost all nontraditional-extending the number of input elements-faults, see [10];…”
Section: Testable Architecture For Self-testingmentioning
confidence: 99%