The metal–semiconductor contact

Northrop, D. C.

doi:10.1038/284403a0

Cited by 11 publications

(9 citation statements)

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“…nterfacing metals with semiconductor surfaces at the nanometer scale has received much attention 1 as a result of the critical importance of these interfaces for applications such as integrated circuits, 2Ϫ4 optoelectronics, 5,6 and others. 7,8 An efficient and versatile approach for the synthesis of metallic nanostructures on semiconductors is galvanic displacement, a spontaneous electrochemical reaction that is a member of the electroless deposition family.…”

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confidence: 99%

Heteroepitaxial Growth of Gold Nanostructures on Silicon by Galvanic Displacement

et al. 2009

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This work focuses on the synthesis and interfacial characterization of gold nanostructures on silicon surfaces, including Si(111), Si(100), and Si nanowires. The synthetic approach uses galvanic displacement, a type of electroless deposition that takes place in an efficient manner under aqueous, room-temperature conditions. The case of gold-on-silicon has been widely studied and used for several applications and yet, a number of important, fundamental questions remain as to the nature of the interface. Some studies are suggestive of heteroepitaxial growth of gold on the silicon surface, whereas others point to the existence of a silicon؊gold intermetallic sandwiched between the metallic gold and the underlying silicon substrate. Through detailed high resolution transmission electron microscopy (TEM), combined with selected area electron diffraction (SAED) and nanobeam diffraction (NBD), heteroepitaxial gold that is grown by galvanic displacement is confirmed on both Si(100) and Si(111), as well as silicon nanowires. The coincident site lattice (CSL) of gold-on-silicon results in a very small 0.2% lattice mismatch due to the coincidence of four gold lattices to three of silicon. The presence of gold؊silicon intermetallics is suggested by the appearance of additional spots in the electron diffraction data. The gold؊silicon interfaces appear heterogeneous with distinct areas of heteroepitaxial gold on silicon, and others, less well-defined, where intermetallics may reside. The high resolution cross-sectional TEM images reveal a roughened silicon interface under these aqueous galvanic displacement conditions, which most likely promotes nucleation of metallic gold islands that merge over time: a Volmer؊Weber growth mechanism in the initial stages.

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Heteroepitaxial Growth of Gold Nanostructures on Silicon by Galvanic Displacement

et al. 2009

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“…Evaporation of solvent and recrystallization from hexane afforded pure 4T-Br 2 as a orange solid; yield: 0.40 g (82%); mp 264 °C. 1 2.2. Crystal Growth and Device Assembly and Characterization.…”

Section: Experiemental Sectionmentioning

confidence: 99%

“…Metal–semiconductor interfaces represent fundamental elements in the fabrication of optoelectronic devices and integrated circuits. Their relevance is recognized in the field of both inorganic and organic semiconductors. , Control on the nanometer scale of the growth of metal–semiconductor interfaces has motivated the development of metallization methods other than thermal evaporation and electrodeposition. With the aim to ensure also a substantial impact on costs and versatility, electroless deposition methods of metallic nanostructures have recently gained much attention. − Electroless methods rely on the reduction of the metal cations in aqueous solution by direct contact with the target surface, inducing the spontaneous deposition of a metal layer (plating) .…”

Section: Introductionmentioning

confidence: 99%

“…Their relevance is recognized in the field of both inorganic and organic semiconductors. 1,2 Control on the nanometer scale of the growth of metalÀsemiconductor interfaces has motivated the development of metallization methods other than thermal evaporation and electrodeposition. With the aim to ensure also a substantial impact on costs and versatility, electroless deposition methods of metallic nanostructures have recently gained much attention.…”

Section: Introductionmentioning

confidence: 99%

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Electroless Silver Plating of the Surface of Organic Semiconductors

et al. 2011

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The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor.

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“…[1][2][3][4][5][6][7] Metal structures on semiconductor surfaces have been produced using techniques such as photolithography, 7 electron beam lithography, 7,8 microcontact printing, 9,10 nanoimprint lithography, 11,12 soft lithographic nanopatterning. 13 Scanning probe-based lithography techniques such as superlattice nanowire pattern transfer, 14 dip pen 15 and static/dynamic plow lithography [16][17][18][19][20] have been demonstrated as useful approaches in the fabrication of metal structures on various surfaces.…”

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Galvanic Deposition of Gold on GaAs: A Tip-Induced Lithography Approach

Gaikwad

Djokić

Thundat

2015

J. Electrochem. Soc.

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A lithography technique based on reduction of metal ions on localized regions of GaAs surfaces is demonstrated. In this technique, an atomic force microscopy (AFM) tip was used to create localized defect patterns on a GaAs surface while operated in air. Subsequent exposure of the semiconductor surface to an Au(III) solution results in the deposition of gold by galvanic displacement reaction on pre-patterned defect areas. [16][17][18][19][20] have been demonstrated as useful approaches in the fabrication of metal structures on various surfaces.The metallization of semiconductor surfaces via the galvanic displacement reaction has been intensively investigated.2,21-23 Galvanic displacement deposition is a relatively simple redox reaction in which noble metal ions in solutions are reduced by the substrate resulting in growth of metal deposits with various surface morphologies. The surface morphology of electroless deposited metals depends on the substrate, composition of the electrolyte, including pH and conditions of deposition eg. temperature, stirring etc.. 24,25 Metallization of semiconductors via galvanic displacement leads to the deposition of metal over the entire surface. Therefore, masking of the surface of semiconductors with specific polymers is required in order to fabricate desired metallic patterns. Use of polymer masks to restrict reduction of gold on a specific area has been applied in most of static/dynamic plow-based lithography techniques. [16][17][18][19] In this work a simple three step process for a deposition of 50 nm wide and 10 nm high gold nanowires on GaAs semiconductor is described. This technique may allow the direct deposition of noble metals such as Au, Ag, or similar on GaAs semiconductor surface. ExperimentalCommercially available n-type GaAs (100) semiconductor wafers (Wafer world Inc, Florida) cut into 1 cm 2 pieces were used as substrates in the present experiments. In order to confirm the deposition of gold onto GaAs via the galvanic displacement reaction, the substrates were cleaned with ethanol and then simply immersed into 5 mM gold chloride trihydrate (HAuCl 4 · 3H 2 O) solution for one hour. All experiments were performed at room temperature (about 22• C). After one hour of immersion, GaAs wafers were removed from the Au-containing solution, carefully washed with distilled water and then with ethanol. The substrates were stored under ethanol for the future scanning electron microscopy (SEM) and X-ray diffraction (XRD) examinations.For the tip-induced lithography on GaAs semiconductor, the following experiments were performed. The substrates were first cleaned * Electrochemical Society Active Member.* * Electrochemical Society Fellow. z E-mail: sdjokic@telus.net with deionized water and sonicated in 95% ethanol solution for 2 minutes to remove the contaminations. The substrates were then dried by blowing N 2 gas and subjected to the three step lithography process. 0.01% Br 2 dissolved in CH 3 OH (BrMeOH) solution was used to clean the GaAs substrate prior to gold deposition....

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The metal–semiconductor contact

Cited by 11 publications

References 0 publications

Heteroepitaxial Growth of Gold Nanostructures on Silicon by Galvanic Displacement

Heteroepitaxial Growth of Gold Nanostructures on Silicon by Galvanic Displacement

Electroless Silver Plating of the Surface of Organic Semiconductors

Galvanic Deposition of Gold on GaAs: A Tip-Induced Lithography Approach

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