The last CPU

Abstract

Since the end of Dennard scaling and Moore's Law have been foreseen, specialized hardware has become the focus for continued scaling of application performance. Programmable accelerators such as smart memory, smart disks, and smart NICs are now being integrated into our systems. Many accelerators can be programmed to process their data autonomously and require little or no intervention during normal operation. In this way, entire applications are offloaded, leaving the CPU with the minimal responsibilities of initialization, coordination and error handling.We claim that these responsibilities can also be handled in simple hardware other than the CPU and that it is wasteful to use a CPU for these purposes. We explore the role and the structure of the OS in a system that has no CPU and demonstrate that all necessary functionality can be moved to other hardware. We show that almost all of the pieces for such a system design are already available today. The responsibilities of the operating system must be split between self-managing devices and a system bus that handles privileged operations. CCS CONCEPTS• Computer systems organization → Peer-to-peer architectures.

The Case for Performance Interfaces for Hardware Accelerators

“…We believe that the status quo is equivalent to writing software without semantic interfaces. With accelerators expected to become ubiquitous in the near future [44,61], this status quo must change.…”

Enabling dynamic and intelligent workflows for HPC, data analytics, and AI convergence

“…These technologies, called persistent memories or nonvolatile memories (NVM), such as Intel Optane DC [50], are similar to memory in speed, similar to disk in capacity, and are byte-addressable. These features open the door to computing directly on the stored data without having to bring it to memory, enabling HPC, DA, and AI applications to deal with larger volumes of data (i.e., not fitting in main memory) at high-speed [51].…”

Past, Present and Future of Computational Storage: A Survey

“…Similarly, the use and applications for peer to peer dma over PCIe are increasing as well [5,73], particularly due to NVMe-oF and RDMA. With current trends of an increasing amount of special purpose processors, perhaps it has become possible for an heterogeneous computing architecture of autonomous special purpose processors to emerge [58].…”

“…Key examples are the neural engines inside Apples A14 and M1 processors. Researchers predict this trend of special purpose hardware is only going to increase [58].…”

“…Full blown heterogeneous architectures will become the norm [58,81]. We already see this transition in devices such as iPhones.…”