The integration of boundary-scan test methods to a mixed-signal environment

Ley, Adam W

doi:10.1109/test.1999.805626

Cited by 4 publications

(1 citation statement)

References 10 publications

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“…Existing EDA tools and techniques established for pure digital circuits cannot be applied directly to test the digital core in an AMS system unless the input and output pins of the digital block can be made directly accessible. To access digital cores that are difficult to test, DFT techniques such as boundary scan [12], test point insertion [23], etc. are proposed.…”

Section: Introductionmentioning

confidence: 99%

RETRACTED: MATLAB-Simulink based framework for test generation of analog driven digital blocks

Kumari

Bhattacharya

2022

Preprint

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The paper proposes a new approach to build a MATLAB-Simulink based framework for testing digital combinational blocks embedded in analog and mixed signal (AMS) circuit without adding any Design for testability (DFT) or additional circuit. In this work, a well-known ATPG (Automatic Test Pattern Generation) algorithm is implemented in MATLAB, followed by application of generated test pattern to the combinational gates modeled in Simulink. The libraries for combinational logic gates are created in Simulink. The proposed approach exploits the linear analog block itself to generate the required test patterns for digital block using a method, namely, ‘analog backtrace’ which is realized with the help of inverted signal flow graph (ISFG). An excellent accuracy has been achieved through the numerical modeling adopted for building ISFG models. Sensitivity analysis is also performed to ensure that changes in analog circuit component values have the least possible impact on the proposed technique. The effectiveness of the proposed method has been successfully verified through SPICE simulation of AMS circuit structures formed by combinations of some benchmark analog circuits driving digital blocks. The simulation results show that the proposed framework is able to find a test sinusoid which can detect the single stuck-at faults in a combinational digital block with fault coverage of nearly 100%.

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Section: Introductionmentioning

confidence: 99%