The cut-off frequency f t , the maximum frequency of oscillation f max and the collector-emitter breakdown voltage BV CEO are computed for various types of Si-based bipolar transistors with different selectively implanted collector (SIC) profiles. In particular, the influence of SIC profiles on f t versus BV CEO and f max versus BV CEO characteristics is investigated. Subsequently, the f max versus f t behaviour is discussed. It is shown that for slow transistors (BJTs) there is a trade-off between f t and f max . However, in the case of faster HBTs this trend can be reversed.