The Implementation of a Power Efficient BCNN-Based Object Detection Acceleration on a Xilinx FPGA-SoC

Kim, Heekyung; Choi, Ken

doi:10.1109/ithings/greencom/cpscom/smartdata.2019.00060

Cited by 10 publications

(12 citation statements)

References 8 publications

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“…The evaluation metric of the object detection is mean Average Precision (mAP), which measures the sensitivity of the neural network. From the result in Table 14 on PASCAL VOC dataset, the highest mAP is 79% that achieved by [249] it based on YOLOv2 [248] with DarkNet backbone. While LWS-Det [246] based on Faster RCNN with ResNet-34, obtain a comparable mAP with the full-precision counterpart by a difference of ∼2%.…”

Section: ) Object Detectionmentioning

confidence: 99%

“…S. Sun et al [241] suggested a fast object detection algorithm by combining the proposals prediction and object classification processes. While in [249], the authors introduced an FPGA accelerator of BNN, that based on YOLOv2 [248] for object detection. In [243], the authors introduced a greedy layer-wise method as an alternative to binarizing all the weight at the same time.…”

Section: ) Object Detectionmentioning

confidence: 99%

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A Systematic Literature Review on Binary Neural Networks

et al. 2023

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This paper presents an extensive literature review on Binary Neural Network (BNN). BNN utilizes binary weights and activation function parameters to substitute the full-precision values. In digital implementations, BNN replaces the complex calculations of Convolutional Neural Networks (CNNs) with simple bitwise operations. BNN optimizes large computation and memory storage requirements, which leads to less area and power consumption compared to full-precision models. Although there are many advantages of BNN, the binarization process has a significant impact on the performance and accuracy of the generated models. To reflect the state-of-the-art in BNN and explore how to develop and improve BNNbased models, we conduct a systematic literature review on BNN with data extracted from 239 research studies. Our review discusses various BNN architectures and the optimization approaches developed to improve their performance. There are three main research directions in BNN: accuracy optimization, compression optimization, and acceleration optimization. The accuracy optimization approaches include quantization error reduction, special regularization, gradient error minimization, and network structure. The compression optimization approaches combine fractional BNN and pruning. The acceleration optimization approaches comprise computing in-memory, FPGA-based implementations, and ASIC-based implementations. At the end of our review, we present a comprehensive analysis of BNN applications and their evaluation metrics. Also, we shed some light on the most common BNN challenges and the future research trends of BNN.

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Section: ) Object Detectionmentioning

confidence: 99%

Section: ) Object Detectionmentioning

confidence: 99%

A Systematic Literature Review on Binary Neural Networks

et al. 2023

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“…Especially in the ML community, the computation-intensive design space exploration of convolutional neural networks can be sped up by scalable PYNQ implementation [11]. Furthermore, support for low-precision number formats enables using AxC to increase neural network throughput [12].…”

Section: A Related Workmentioning

confidence: 99%

Towards Benchmarking GNSS Algorithms on FPGA using SyDR

Grenier

Damsgaard

Liu

et al. 2023

2023 International Conference on Localization and GNSS (ICL-GNSS)

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Global Navigation Satellite System (GNSS) is widely used today for both positioning and timing purposes. Many distinct receiver chips are available off-the-shelf, each tailored to match various applications' requirements. Being implemented as Application-Specific Integrated Circuits, these chips provide good performance and low energy consumption but must be treated as "black boxes" by customers. This prevents modification, research in GNSS processing chain enhancement (e.g., application of Approximate Computing techniques), and designspace exploration for finding the optimal receiver implementation per each use case. In this paper, we review the development of SyDR, an open-source Software-Defined Radio oriented towards benchmarking of GNSS algorithms. Specifically, our goal is to integrate certain components of the GNSS processing chain in a Field-Programmable Gate Array and manage their operation with a Python program using the Xilinx PYNQ flow. We present the early steps of converting parts of SyDR to C, which will be later converted to Hardware Description Language descriptions using High-Level Synthesis. We demonstrate successful conversion of the tracking process and discuss benefits and drawbacks arising thereof, before outlining next steps in preparation for hardware implementation.

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“…Hemmati et al [15], accelerated the combination of HOG and SVM on ITX board using Zynq SoC which is by using an extra hardware. In [19,27], an improved hardware design was also used to accelerate the pedestrian detector. Instead of detecting pedestrians, [40] detects dumpsters which is a very typical obstacle in autonomous driving.…”

Section: Pedestrian Detectionmentioning

confidence: 99%

A dynamic discarding technique to increase speed and preserve accuracy for YOLOv3

Martinez‐Alpiste

Golkarnarenji

Wang

et al. 2021

Neural Comput & Applic

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This paper proposes an acceleration technique to minimise the unnecessary operations on a state-of-the-art machine learning model and thus to improve the processing speed while maintaining the accuracy. After the study of the main bottlenecks that negatively affect the performance of convolutional neural networks, this paper designs and implements a discarding technique for YOLOv3-based algorithms to increase the speed and maintain accuracy. After applying the discarding technique, YOLOv3 can achieve a 22% of improvement in terms of speed. Moreover, the results of this new discarding technique were tested on Tiny-YOLOv3 with three output layers on an autonomous vehicle for pedestrian detection and it achieved an improvement of 48.7% in speed. The dynamic discarding technique just needs one training process to create the model and thus execute the approach, which preserves accuracy. The improved detector based on the discarding technique is able to readily alert the operator of the autonomous vehicle to take the emergency brake of the vehicle in order to avoid collision and consequently save lives.

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The Implementation of a Power Efficient BCNN-Based Object Detection Acceleration on a Xilinx FPGA-SoC

Cited by 10 publications

References 8 publications

A Systematic Literature Review on Binary Neural Networks

A Systematic Literature Review on Binary Neural Networks

Towards Benchmarking GNSS Algorithms on FPGA using SyDR

A dynamic discarding technique to increase speed and preserve accuracy for YOLOv3

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