The FEI3 readout chip for the ATLAS pixel detector

Perić, I.; Blanquart, L.; Comes, G.; Denes, P.; Einsweiler, K.; Fischer, P.; Mandelli, E.; Meddeler, G.

doi:10.1016/j.nima.2006.05.032

Cited by 232 publications

(135 citation statements)

References 9 publications

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“…The wafer layout also includes sensors compatible with the FE-I3 read-out chip [10], sensors compatible with the OmegaPIX readout chip [11] and many test structures. More details can be found in Ref.…”

Section: Wafer Layoutmentioning

confidence: 99%

Novel silicon n-on-p edgeless planar pixel sensors for the ATLAS upgrade

Bomben

Bagolini

Boscardin

et al. 2013

Nuclear Instruments and Methods in Physics Research Section A:

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a b s t r a c tIn view of the LHC upgrade phases towards HL-LHC, the ATLAS experiment plans to upgrade the inner detector with an all-silicon system. The n-on-p silicon technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost effectiveness. The edgeless technology would allow for enlarging the area instrumented with pixel detectors. We report on the development of novel n-on-p edgeless planar pixel sensors fabricated at FBK (Trento, Italy), making use of the active edge concept for the reduction of the dead area at the periphery of the device. After discussing the sensor technology and fabrication process, we present device simulations (pre-and post-irradiation) performed for different sensor configurations. First preliminary results obtained with the test-structures of the production are shown.

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Section: Wafer Layoutmentioning

confidence: 99%

Novel silicon n-on-p edgeless planar pixel sensors for the ATLAS upgrade

Bomben

Bagolini

Boscardin

et al. 2013

Nuclear Instruments and Methods in Physics Research Section A:

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“…This technique allows for a simpler deposition process of the isolation layer with respect to straight side wall TSV, using thin film polymers. Both processes are demonstrated on monitor wafers, and the tapered profile via process is selected to prototype demonstrator TSV modules with the ATLAS FE-I3 electronics [8]. Fig.…”

Section: Post-processing Tsvmentioning

confidence: 99%

Experience with 3D integration technologies in the framework of the ATLAS pixel detector upgrade for the HL-LHC

Aruntinov

Barbero

Hemperek

et al. 2013

Nuclear Instruments and Methods in Physics Research Section A:

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a b s t r a c t 3D technologies are investigated for the upgrade of the ATLAS pixel detector at the HL-LHC. R&D focuses on both, IC design in 3D, as well as on post-processing 3D technologies such as Through Silicon Via (TSV). The first one uses a so-called via first technology, featuring the insertion of small aspect ratio TSV at the pixel level. As discussed in the paper, this technology can still present technical challenges for the industrial partners. The second one consists of etching the TSV via last. This technology is investigated to enable 4-side abuttable module concepts, using today's pixel detector technology. Both approaches are presented in this paper and results from first available prototypes are discussed.

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“…The irradiated device is modeled by inserting traps into the bulk, according to the "Perugia" model [18]. After verifying that the trap model accurately predict the leakage current and the charge collection efficiency of an irradiated planar detector, a variety of different 3D pixel layouts (to be coupled to the FE-I3 read-out chip of the ATLAS experiment [19]), differing for the number of n columns per pixel (ranging from 2 to 8), have been taken into account. CCE, noise, capacitance were simulated to extract the best number of columns per cell.…”

Section: Fig2: Electrons Density Concentration In Four Different 3dmentioning

confidence: 99%

Simulations of 3D detectors

Giacomini¹

2012

Proceedings of the 20th Anniversary International Workshop on Vertex Detectors — PoS(Vertex 2011)

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3D detectors, in which the n and p electrodes are columns etched through the silicon substrates, have proven high radiation tolerance and thus are one of the most suitable candidates for harsh radiation environments, such as vertex detectors. Being the process much more complicated than the planar one, over the years, several simplified 3D families have been studied and fabricated. In this context, TCAD simulations are an excellent tool to predict the behaviour and performance of new detector concepts. In this paper we give an overview of this simulation activity mainly focussing on the 3D FBK technology. We show that it is possible to reproduce also unexpected phenomena, such as the observed charge multiplication in highly irradiated devices.

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The FEI3 readout chip for the ATLAS pixel detector

Cited by 232 publications

References 9 publications

Novel silicon n-on-p edgeless planar pixel sensors for the ATLAS upgrade

Novel silicon n-on-p edgeless planar pixel sensors for the ATLAS upgrade

Experience with 3D integration technologies in the framework of the ATLAS pixel detector upgrade for the HL-LHC

Simulations of 3D detectors

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