The Effect of Time Synchronization Error in LAN-Based Digital Substation

Son, Kyou Jung; Chang, Tae‐Gyu; Kang, Sang-Hee

doi:10.3390/s19092044

Cited by 5 publications

(4 citation statements)

References 18 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…IEEE 1588-2008 (PTPv2) [9] supports obtaining hardware timestamps, and the accuracy can reach the sub-microsecond level. It is widely used in most fields, such as Smart Grid [10], Seismic Survey [11], Automotive Electronics [12], and Flight Test [13]. White Rabbit (WR) [14], also known as IEEE 1588-2019 [15], uses optical fiber to transmit time and frequency information.…”

Section: Introductionmentioning

confidence: 99%

A Fuzzy-PI Clock Servo with Window Filter for Compensating Queue-Induced Delay Asymmetry in IEEE 1588 Networks

Zhang,

Li,

Wang

et al. 2024

Sensors

View full text Add to dashboard Cite

Clock synchronization is one of the popular research topics in Distributed Measurement and Control Systems (DMCSs). In most industrial fields, such as Smart Grid and Flight Test, the highest requirement for synchronization accuracy is 1 μs. IEEE 1588 Precision Time Protocol-2008 (PTPv2) can theoretically achieve sub-microsecond accuracy, but it relies on the assumption that the forward and backward delays of PTP packets are symmetrical. In practice, PTP packets will experience random queue delays in switches, making the above assumption challenging to satisfy and causing poor synchronization accuracy. Although using switches supporting the Transparent Clock (TC) can improve synchronization accuracy, these dedicated switches are generally expensive. This paper designs a PTP clock servo for compensating Queue-Induced Delay Asymmetry (QIDA), which can be implemented based on ordinary switches. Its main algorithm comprises a minimum window filter with drift compensation and a fuzzy proportional–integral (PI) controller. We construct a low-cost hardware platform (the cost of each node is within USD 10) to test the performance of the clock servo. In a 100 Mbps network with background (BG) traffic of less than 70 Mbps, the maximum absolute time error (max |TE|) does not exceed 0.35 μs, and the convergence time is about half a minute. The accuracy is improved hundreds of times compared with other existing clock servos.

show abstract

Section: Introductionmentioning

confidence: 99%

A Fuzzy-PI Clock Servo with Window Filter for Compensating Queue-Induced Delay Asymmetry in IEEE 1588 Networks

Zhang,

Li,

Wang

et al. 2024

Sensors

View full text Add to dashboard Cite

show abstract

“…Unreliable and erroneous timestamps have resulted in significant delays in diagnosing the cause of blackouts. The impact of the measurement device's time error is that they are often miscalculated as the power system disturbances [2]. The role of communication and computing technologies in distribution systems has gained momentum with the integration of Maman Ahmad Khan is with General Electric, EH35DA Edinburgh, U.K. (e-mail: maman.ahmadkhan@gmail.com).…”

Section: Introductionmentioning

confidence: 99%

IEEE 1588 Time Synchronization in Power Distribution System Applications: Timestamping and Accuracy Requirements

Khan

Hayes

2023

IEEE Systems Journal

View full text Add to dashboard Cite

The monitoring and control of power distribution systems requires an accurate and stable time synchronization infrastructure. The major requirement for a time synchronization system is sharing a global time throughout the network. This article provides an overview of the synchronization techniques implemented in power distribution systems. The implementation of different techniques for time synchronization due to heterogeneous communication infrastructure creates various challenges in the system. Therefore, this article aims to propose a homogeneous, uniform approach for a network-based synchronization mechanism in or to implement multiple distribution system applications. For this purpose, the precision time protocol (PTP), IEEE 1588, is tested experimentally for various time criticality with an Ethernet-based communication network. The testbed uses single board computers to explore different criticality of the timestampings for IEEE 1588 (PTP) to determine how various applications need different type of timestamping depending upon the performance, cost, and accuracy requirements. These different levels of timestamping requirements for synchronization affect the performance of a range of nextgeneration distribution system applications. The proposed solution provides monitoring for each application using only a single time synchronization technique with an Ethernet-based network.

show abstract

“…It is shown that the degraded time synchronizing performance directly leads to maloperation of industrial applications such as protection and control of power system apparatus [ 9 , 10 , 11 ]. Improved performance of the IEEE 1588 PTP is achieved in many ways, e.g., dealing with external disturbances and attack [ 11 , 12 , 13 ], providing enhanced clock synchronization methods [ 14 , 15 ], reflecting asymmetric network delay [ 16 , 17 ], etc.…”

Section: Introductionmentioning

confidence: 99%

Distributed Nodes-Based Collaborative Sustaining of Precision Clock Synchronization upon Master Clock Failure in IEEE 1588 System

Son

Chang

2020

Sensors

Self Cite

View full text Add to dashboard Cite

This paper proposes a distributed nodes-based clock synchronization method to sustain sub-microsecond precision synchronization of slave clocks upon master clock failure in IEEE 1588 PTP (precision time protocol) system. The sustaining is achieved by synchronizing the slave clocks to the estimated reference clock which is obtained from the analysis of distributed slave clocks. The proposed method consists of two clock correction functions (i.e., a self-correction and a collaborative correction, respectively). Upon master failure, the self-correction estimates a clock correction value based on the clock model which is constructed during normal PTP operation. The collaborative correction is performed in the preselected management node. The management node estimates a reference clock by collecting and analyzing clock information gathered from the other slave clocks. The performance of the proposed method is simulated by computer to show its usefulness. It is confirmed that the fifty (50) clock model-based collaborative correction maintains 10−6 second PTP accuracy for 10 min prolonged period after the master failure when tested with clock offset variations less than 50 ppm.

show abstract

The Effect of Time Synchronization Error in LAN-Based Digital Substation

Cited by 5 publications

References 18 publications

A Fuzzy-PI Clock Servo with Window Filter for Compensating Queue-Induced Delay Asymmetry in IEEE 1588 Networks

A Fuzzy-PI Clock Servo with Window Filter for Compensating Queue-Induced Delay Asymmetry in IEEE 1588 Networks

IEEE 1588 Time Synchronization in Power Distribution System Applications: Timestamping and Accuracy Requirements

Distributed Nodes-Based Collaborative Sustaining of Precision Clock Synchronization upon Master Clock Failure in IEEE 1588 System

Contact Info

Product

Resources

About