The effect of metal gate recess profile on FinFET performance
Pradeep Nanja,
Brett Lowe,
Sumant Sarkar
Abstract:In FinFET transistors, the parasitic capacitance between the source/drain contact and the metal gate tends to be high, and this can negatively impact device performance. Adding a metal gate recess step can reduce capacitance, but unfortunately it also increases the metal gate resistance. By changing the metal gate recess profile, a good balance between resistance and capacitance can be achieved to reduce RC. In this work, we investigate FinFET metal gate recess profile settings and how changes in profile setti… Show more
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