The Effect of Interface States on Single-Walled Carbon Nanotube Transistors

Li, Huaping

doi:10.1149/2.0271609jss

Cited by 5 publications

(2 citation statements)

References 39 publications

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“…For examples, we utilized Unaxis 790 PECVD for SiNx growth and found the best deposition parameters as shown in Table 1 with the flow rate of ammonium to silane in the ratio of 10 sccm/5.3 sccm. 3,6 Using the same flow rate of NH 3 to SiH 4 with STS PECVD, no current was detected, indicating the damage of carbon nanotube thin films. However, with the standard STS PECVD recipe ( Table 2), the fabricated carbon nanotube thin film transistors showing the similar characteristics as presented in Figure 5.…”

Section: Resultsmentioning

confidence: 99%

37.1: Manufacturing Carbon Nanotube Thin Film Transistor Using Industrial Conditions

Li¹

2018

Symp Digest of Tech Papers

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Section: Resultsmentioning

confidence: 99%

37.1: Manufacturing Carbon Nanotube Thin Film Transistor Using Industrial Conditions

Li¹

2018

Symp Digest of Tech Papers

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“…They used the n-CNT TFTs in a driver circuit for an OLED display. Li used sputtered and PECVD grown SiN x thin films as gate dielectrics for CNTFETs on glass substrates [34]. The authors optimized the film deposition conditions and realized top-gated n-CNTFETs.…”

Section: Introductionmentioning

confidence: 99%

Dielectric based charge carrier tuning for CNT CMOS inverters

Gangavarapu

Sharma

Ganapathi

et al. 2018

Semicond. Sci. Technol.

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The realization of Carbon nanotube (CNT) based CMOS compatible complementary logic circuits is one of the bottlenecks that needs to be overcome in order to consider CNTs as an alternative to silicon in future CMOS technology. In this work, we demonstrate complementary logic inverters using solution-processed CNTs. The type of charge carriers in the CNT field effect transistors (FET) have been tuned by changing the dielectric environment to realize both p-type and n-type CNTFETs. We have fabricated p-type CNTFETs using electron beam evaporated HfO 2 as the top-gate dielectric and n-type CNTFETs using plasma enhanced chemical vapor deposition grown Silicon nitride as the top-gate dielectric. Using this fabrication approach, we realize high performance p-and n-CNTFETs employing regular metals such as Palladium for the source/drain contacts instead of rare earth metal contacts such as scandium. We demonstrate complementary logic inverters with a DC gain as high as 6.7 and operating voltages within 1 V.

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Gate Tunable Organic Light Emitting Diodes: Principles and Prospects

Li¹

2018

The Chemical Record

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This record summarizes our recent developments on gate-tunable organic light-emitting diodes (OLEDs). The key point is to modulate the charge carrier injection barrier by the applied gate potential. One way is to electrochemically dope charge carrier injection layer through porous electrodes. The electrochemically doped charge carrier layer thus form gate-tunable contact with porous electrodes. Another way is to modulate the work-function of electrodes that can have varied charge carrier injection barriers following the applied gate potential. Gate-tunable OLEDs based on these two working principles have been fabricated, characterized and demonstrated for displaying simple digitals and letters. New materials including dielectric, porous electrodes, work function tunable electrodes, and charge carrier injection materials have been further explored for performance improvement.

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The Effect of Interface States on Single-Walled Carbon Nanotube Transistors

Cited by 5 publications

References 39 publications

37.1: Manufacturing Carbon Nanotube Thin Film Transistor Using Industrial Conditions

37.1: Manufacturing Carbon Nanotube Thin Film Transistor Using Industrial Conditions

Dielectric based charge carrier tuning for CNT CMOS inverters

Gate Tunable Organic Light Emitting Diodes: Principles and Prospects

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