2006
DOI: 10.1016/j.microrel.2005.01.019
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The effect of die attach voiding on the thermal resistance of chip level packages

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Cited by 86 publications
(11 citation statements)
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“…The traditional cohesive zone model has been used to analyze the effects of delamination propagation behavior on interface heat transfer and plays a key role in interface crack prediction [34]. Extensive research has also attempted to elucidate the relationship between the defects and reliability characteristics of electronic devices, including interface failure effects on reliability [35][36][37], void effects of DA layers in LED packages [38][39][40][41][42][43] and DC-to-DC converters [44]. The degradation of heat transfer performance is one of the main causes of electronic package failure; hence, several studies tried to characterize the mechanism behind the degradation of heat transfer performance from the perspective of energy loss [10,45].…”
Section: Entropy Methodologies For Microstructuresmentioning
confidence: 99%
“…The traditional cohesive zone model has been used to analyze the effects of delamination propagation behavior on interface heat transfer and plays a key role in interface crack prediction [34]. Extensive research has also attempted to elucidate the relationship between the defects and reliability characteristics of electronic devices, including interface failure effects on reliability [35][36][37], void effects of DA layers in LED packages [38][39][40][41][42][43] and DC-to-DC converters [44]. The degradation of heat transfer performance is one of the main causes of electronic package failure; hence, several studies tried to characterize the mechanism behind the degradation of heat transfer performance from the perspective of energy loss [10,45].…”
Section: Entropy Methodologies For Microstructuresmentioning
confidence: 99%
“…The voids extend through the entire DA material. Because the thermal conductivity of void/air is extremely low (0.113∼0.026 W/mK), 16,17 only bonded areas were used to calculate the thermal resistance. As a result, the calculated area thermal resistance per unit thickness (R A/h , RA/h) of SAC305DN was 0.045 mK/W which was 47.87% of SAC305, 26.47% of Ag-P and only 7.89% of Ag-S as shown in Table I.…”
Section: Resultsmentioning
confidence: 99%
“…Fleischer et al 25 discuss the effect of die attach voiding on the thermal resistance of chip level packages. Such voids are easily formed in the solder layer during manufacturing, and are found to nucleate, grow and coalesce with thermal cycling.…”
Section: The Problem Of Non-linearitymentioning
confidence: 99%