A model is proposed and calculation is performed of the simultaneous diffusion of donor and acceptor impurities during the fabrication of a silicon planar transistor structure. The model includes (i) a two‐flux diffusion mechanism for the base impurity, (ii) quasi‐equilibrium spatial distribution of the electrically charged vacancies, and (iii) capture of the impurity interstitials by the vacancies. It is shown that the base impurity diffusion can be enhanced (push effect) as well as retarded (pull effect) depending on resulting thickness of the base.