The design of high-frequency CIC-filters according to the 0.18 &amp;#x00B5;m technology

Sedinin, V. I.; Mamychev, Vasily; Glukhov, Alexander V.

doi:10.1109/edm.2014.6882504

Cited by 2 publications

(1 citation statement)

References 3 publications

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“…The field programmable gate array (FPGA), which can offer fast real-time processing in parallel, mainly consists of the AND and OR gates, and thus FPGA is very suitable for implementation of a CIC filter containing shifters and adders. This paper presents a novel method to design a polyphase interpolator, which uses the CIC filter [13], [14] to control the time-delay accuracy of the ultrasonic phased array technology. This study gives a thorough analysis of the feedback structure of the CIC filter and provides a comprehensive explanation of the polyphase interpolation principle.…”

Section: Introductionmentioning

confidence: 99%

Design of Polyphase Cascaded Integrator Comb Interpolator Filter for Ultrasonic Phased Array Time Delays

Tang¹,

Liu²,

Ruo-bo³

2017

IJET

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Time-delay accuracy plays a crucial role in beamforming algorithms of ultrasonic phased array. This paper presents a novel design for a polyphase cascaded integrator comb (CIC) interpolator filter, which can achieve high time-delay accuracy for an ultrasonic phased array focusing-delay system, and the beamforming principle and time-delay algorithm implementation are studied in detail. Firstly, a novel design for the CIC filter is proposed, which improves traditional designs (The data rate increases with the increase of interpolation coefficient, when the direct interpolation mode is used) by using polyphase interpolation. Secondly, according to the principle of interpolating and filtering, CIC polyphase interpolation formulas are deduced by using the exhaustive method, and the formulas can simultaneously implement interpolation and polyphase decomposition with the data rate of each phase same as the original rate. Finally, the algorithm feasibility is validated by simulation analysis and field programmable gate array implementation. Experimental results reveal that a time-delay accuracy of 1 ns at a 100 MHz sampling frequency can be achieved using the improved 10-fold polyphase interpolation CIC filter, and the maximum relative error of the time-delay accuracy is typically only-0.08% for 5 MHz ultrasonic echo waves. This design can be used for many important practical applications for phased array instruments with excellent performance.

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Section: Introductionmentioning

confidence: 99%

Design of Polyphase Cascaded Integrator Comb Interpolator Filter for Ultrasonic Phased Array Time Delays

Tang¹,

Liu²,

Ruo-bo³

2017

IJET

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A survey of digital down converter architecture for next generation wireless applications

Abinaya¹,

Maheswari²

2020

IOP Conf. Ser.: Mater. Sci. Eng.

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This article presents a brief survey of Digital down Converter (DDC) architecture and its extensive applications. The distinctive feature of the DDC architecture is its frequency translation from real data signal at an intermediate frequency to a complex baseband signal at zero frequency. The architecture of DDC comprises of Numerically Controlled Oscillator (NCO) and decimation filters. The components of ultra efficient DDC architecture have been implemented in Field Programmable Gate Array (FPGA) device. This down converter provides high malleability, customizability and bearable cost. Due to its amenities, digital down converter was utterly studied and applied in many wireless communication technologies.

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The design of high-frequency CIC-filters according to the 0.18 µm technology

Cited by 2 publications

References 3 publications

Design of Polyphase Cascaded Integrator Comb Interpolator Filter for Ultrasonic Phased Array Time Delays

Design of Polyphase Cascaded Integrator Comb Interpolator Filter for Ultrasonic Phased Array Time Delays

A survey of digital down converter architecture for next generation wireless applications

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