The Design and Implementation of Parallel Distributed Algorithm FIR Filter Based on FPGA

Abstract

The article proposed a new method for implementing linear phase FIR filter based on FPGA. For the key to implementing the FIR filter on FPGA—multiply-add operation, a parallel distributed algorithm was presented, which is based on LUT. The designed file was described with VHDL and realized on Altera’s field programmable gate array (FPGA), giving the design method. The experimental results indicated that the system can run stably at 120MHz or more, which can meet the requirements of signal processing for real-time.

An Innovative Embedded Processor-Based Signal Phase Shifter Algorithm

“…Nowadays, most signal processing electronic systems depend on digital signal processing (DSP) systems as they are more effective in handling complex signal manipulation operations compared to analog techniques (Pandey and Pratibha, 2022). Digital filters offer advantages of easy design modifications using software as they do not rely on the environmental parameters such as temperature change and magnetic declination in addition to its cost-effectiveness and capabilities of storing digital data (Ozkan and Saday, 2018). Digital filters play a crucial role in various signal processing implementations, including spectrum analysis, digital image manipulation, audio and video processing, sonar and radar systems, as well as pattern recognition (Wang, 2022;Dallalbashi, 2020).…”