2019
DOI: 10.1016/j.sse.2019.03.017
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The concept of electrostatic doping and related devices

Abstract: Electrostatic doping aims at replacing donor/acceptor dopant species with free electron/hole charges induced by the gates in ultrathin MOS structures. Highly doped N + /P + terminals and virtual P-N junctions can be emulated in undoped layers prompting innovative reconfigurable devices with enriched functionality. The distinct merit is that the carrier concentration and polarity (i.e., electrostatic doping) are tunable via the gate bias. After presenting the fundamentals, we review the family of electrostatica… Show more

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Cited by 49 publications
(42 citation statements)
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“…One potential solution to doping problem in thin-film poly-GaN films for device applications could be the electrostatic doping (ED) [17,[45][46][47][48] approach where charge carriers are induced in the ultra-thin body semiconductor by using a suitable metal work function or by applying a gate bias. ED has already been demonstrated in various material systems and device geometries where conventional doping is otherwise challenging, as discussed in the next chapter.…”
Section: Role Of Electrostatic Doping (Ed)mentioning
confidence: 99%
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“…One potential solution to doping problem in thin-film poly-GaN films for device applications could be the electrostatic doping (ED) [17,[45][46][47][48] approach where charge carriers are induced in the ultra-thin body semiconductor by using a suitable metal work function or by applying a gate bias. ED has already been demonstrated in various material systems and device geometries where conventional doping is otherwise challenging, as discussed in the next chapter.…”
Section: Role Of Electrostatic Doping (Ed)mentioning
confidence: 99%
“…Note that earlier modeling work on I-V curves of asymmetric dual-gate (DG) devices [99] could be used to derive a model for bias-induced ED including traps. The simultaneous induction of p-type and n-type charged regions in a semiconductor body via an applied field can be realized using a dual (or multiple) gate structure [48]. By biasing two gates with opposite polarities, electrons and holes can be simultaneously induced in a semiconductor Figure 2.10: Schematic cross section of the CNT p-n diode [74].…”
Section: Bias-induced Edmentioning
confidence: 99%
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