The business of building brains

Memristive perovskite solar cells towards parallel solar energy harvesting and processing-in-memory computing

“…Specifically for HP, apart from the coexistence and coupling of ionic and electronic degrees of freedom, unique is also the light/electrically tunable majority carrier concentrations opening the path to solar brain realization. 1,39 Moreover, hybrid HP perovskites were used in memristive devices that can be programmed to two or more stable conductance states for analogue computing. 10 Resistive switching in perovskites is reported to have an either electroforming origin attributed to the formation and rupture of a conductive filament between the bottom and top electrode 40,41 or an interface-dominated switching mechanism 42, 43 .…”

“…These IoT platforms create a robust demand for energy for their power supply, while their ever-increasing number requires ultra-low-power edge-device computing for big data processing. 1 The inherent bottlenecks of Si-based CMOS processors due to their energy inefficient von Neumann computation architecture associated with the ‘memory wall’ issue 2 lead to unsustainable energy cost in IoT data-centric intensive tasks. 3 IoT edge devices 4 are usually not capable of data processing and rely on energy-consuming and high-latency cloud communication.…”

“…44,45 Increasing the pulse width (1V,100ms) in Figure6bminimizes the light induced resistance enhancement although cannot prevent the device resistance to increase approaching 1000ohms. On the other hand, increasing the pulse amplitude at 2V (width either 10ms, Materials Advances, 2022, 00,[1][2][3] This journal is © The Royal Society of Chemistry 2022Please do not adjust margins Please do not adjust margins…”

A Neuromorphic Model With Delay-Based Reservoir for Continuous Ventricular Heartbeat Detection

“…However, the digital operations and mass memory bring several constrains like latency, throughput and power, hindering the further development of computing performance in conventional architecture [20,21]. Meanwhile, a prospective wearable device expects that the intelligent computing can also be carried out at the local edge [21][22][23]. Under such circumstances, a neuromorphic analogue processor based on the above-mentioned DRC architecture is well-suited to act as a direct interface to an ECG electrode with less memory requirement.…”

Crossbar Array of Artificial Synapses Based on Ferroelectric Diodes

“…The goal is to realize non-Von Neumann architecture for computing units, which enable massively parallel processing and save computing time and energy consumption. [1][2][3][4][5] The strength of the connection between two artificial neurons is determined by synaptic weight, which is responsible for conveying the electrical signals between the two neurons. Artificial neurons have already been developed based on CMOS-based processors.…”