The benefits of low operating voltage devices to the energy efficiency of parallel systems

Abstract

Programmable circuits such as general-purpose processors or FPGAs have their end-user energy efficiency strongly dependent on the program that they execute. Ultimately, it is the programmer's ability to code and, in the case of general purpose processors, the compiler's ability to translate source code into a sequence of native instructions that make the circuit deliver the expected performance to the end user. This way, the benefits of energy-efficient circuits build upon energy-efficient devices could be obfuscated by poorly written software. Clearly, having well-written software running on conventional circuits is no better in terms of energy efficiency than having poorly written software running on energy-efficient circuits. Therefore, to get the most out of the energy-saving capabilities of programmable circuits that support low voltage operating modes, it is necessary to address software issues that might work against the benefits of operating in such modes. Multiple software layers are used to abstract away hardware details. Such abstraction enables the solution of complex problems while at the same time the programmer's productivity increases significantly. This comes with a caveat. Software developers often make poor programming choices due to the lack of understanding of how their code affects the usage of the various resources available on the hardware. Poor programming choices leading to a decrease in performance were not an issue since rapid hardware performance improvements were able to compensate for them. More recently, faster switching circuits are much harder to achieve on modern processors with high silicon density due to overheating and quantum effects. Moreover, with the IoT revolution, many systems are depended on limited or unreliable energy sources. These now require the software developer to put a significant effort in writing code that will meet both the energy and performance requirements for a large number of applications. This is a hard challenge as software developers lack the tools that will enable a resource aware software development [1]. To tackle the stagnation of single CPU performance, the microprocessor industry introduced multiprocessing on a single chip. The rationale is simple: if we cannot make them faster, let us make more of them and split the computation among them. With that, gradually, conventional sequential software, including the many layers that compose the , m is giving place to parallel software. However, embracing this solution requires accepting a new challenge: write efficient parallel software. This is significantly harder than creating efficient sequential code. To make things worse, commonly, programmers are not equipped with the skills needed to create parallel software. Addressing the software issues that prevent the benefits of low operating voltage modes reaching the end user might seem then to add up to the challenge of writing good parallel software. Nonetheless, parallel software could as well be an opportunity to employ low operating voltage devic...