The beneficial impact of a p–p ⁺ junction on DC and analog/radio frequency performance of a vertical super‐thin body FET

Abstract

This article investigates the impact of the p-p + junction (at the body-substrate interface) on different direct current (DC) and analog/radio frequency (RF) performance parameters of a newly invented structure called vertical superthin body field effect transistor (VSTB FET) through a well-calibrated TCAD tool. At a fixed body doping, the influence of p-p + junction was inspected for different substrate doping (N s ); which reveals that N s has a robust control on the device electrostatics. Interestingly, higher N s is seen to significantly suppress different short channel effects (SCEs), which in turn helps to improve various DC parameters excellently. An increase in N s from 10 15 to 10 18 cm À3 improves off-state leakage current and on-to-off current ratio by three orders of magnitude. Also, such a change in N s decreases subthreshold swing and drain-induced-barrier-lowering by 8.78 mV/dec and 11.15 mV/V, respectively. The underlying physics behind such improvement at higher N s is explored through the off-state channel electron density profiles corresponding to different N s values. Further, different analog/RF parameters such as transconductance, input capacitance, gate-drain capacitance, output conductance, gain-bandwidth-product, and transconductance frequency product (TFP) show slight improvement for increasing N s . In contrast, TGF, GFP, and GTFP offer large enhancement at higher N s . This study is expected to demonstrate the significance of N s on device performance.

Silicon and Germanium Vertical Super-Thin Body (VSTB) FET: A Comparative Performance Overview Including Architectural Stress-Strain Impact

“…However, such an issue can be addressed by using a higher doping concentration in the substrate than the body as and thereby minimizing I off . 59,60 As Ge increases I on , it is essential to investigate its impact on the power dissipation. In this regard, we calculated the on-state PD by multiplying I on to the supply voltage (V D = 0.4 V).…”

“…However, such issues can be addressed using a higher substrate doping concentration than the body. 59,60 Comparative impact of stress and strain on the performance of Si and Ge device.-The body area of a VSTB FET is enclosed at all sides; especially the thick STI dielectric wall may exert high mechanical stress on the thin channel. Consequently, the performance of the device may get influenced by such effects and can deviate from its expected nature.…”

“…However, such compromises can also be addressed using higher doping concentration in the substrate compared to the body. 59,60 Stress analysis reveals that I on of Si/Ge device increases for the considered three-dimensional heavy stress (simultaneous application of 4 GPa of stress along XX, YY. And ZZ components of stress tensor).…”

“…In our previous works, we have presented a few key analyses on the performance of a VSTB FET. [54][55][56][57][58][59][60][61][62][63] In, 54,55 the scaling effect and noise performance of the device is analyzed, while in, 56 the influence of various interfacial trap distributions and densities on the electrical and noise parameters of the device is shown. Further, in, 57 we have introduced dual material gate (DMG) in the VSTB FET structure and studied its analog/radio-frequency (RF) and linearity performance for the variation in ambient temperature.…”

“…58 Recently, we have shown that the electrical and RF performance of a junctionless VSTB FET can be improved by increasing its substrate doping. 59,60 The impact of high-k gate dielectrics on the performance of a VSTB FET is discussed in. 61,62 Also, the structural optimization of a VSTB FET in terms of its dimensional parameters and material variation is performed to address the self-heating issue.…”