The ATLAS SCT: Commissioning experience and SLHC upgrade

Abstract

The ATLAS Semiconductor Tracker (SCT) has been installed, and fully connected to electrical, optical and cooling services. Commissioning has been performed both with calibration data and cosmic ray events. The cosmics were used to align the detector, measure the hit efficiency and set the timing. The SCT is now ready to take data when the LHC turns on this autumn. At the same time, it is clear that the present ATLAS tracker will need to be renewed for projected luminosity upgrade of the LHC, the SLHC. This is mainly driven by occupancy and radiation hardness issues. The new tracker will likely be entirely made of silicon, with the space of the present SCT largely taken up by detectors with much shorter strips. Several large-scale R&D projects on the sensors and module concepts for this upgrade are running, including sensor and module prototyping. We will report upon the commissioning experience from the SCT, use it to extract valuable lessons for future silicon tracker projects, and give an up-to-date overview of the status and results of the R&D efforts for the ATLAS tracker upgrade.

Front end electronics for silicon strip detectors in 90nm CMOS technology: advantages and challenges

“…It is therefore reasonable to start evaluation of CMOS technologies below 130nm from the point of view of usefulness for front end electronics for future detectors. One of the challenging applications is the development of the front end electronics for silicon trackers, where the important issue is very high occupancy impacting final granularity of the system and number of electronic channels [1]. The primary concern is the minimization of power consumption keeping the rest of the analog parameters like speed, noise and dynamic range as well as radiation tolerance at the required levels.…”

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We present a 16 channel front end prototype implemented in 90nm CMOS IBM process and optimized for 5pF input capacitance. The primary motivation for this project is to study the usefulness of the CMOS technologies below 130nm for front end amplifiers optimized for short strip silicon detectors in Super Large Hadron Collider (SLHC) experiments [1]. In the presented design we show critical aspects of the front end stages implemented in the deep submicron technologies.

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