The application of the scallop nanostructure in deep silicon etching

Abstract

Micro/nanostructures with high aspect ratios in silicon wafers obtained by plasma etching are of great significance in device fabrication. In most cases, the scallop nanostructure in deep silicon etching should be suppressed. However, the scallop nanostructure could be applied in electronic device fabrication as characteristic information, which indicates the balance between deposition and etching. In this work, the applications of scallop nanostructures in etching process optimization and environmental protection are demonstrated. In addition, the minimum effect of the cycle time on the scallop size is reported for the first time. These results could bring new thoughts to the electronic devices related fields, such as micro-electro-mechanical systems (MEMS), silicon capacitors and advanced packaging.

Surface nanostructuring of alkali-aluminosilicate Gorilla display glass substrates using a maskless process

“…After 0.5 h etching, moth-eye like structures with an average height of 500 nm were formed on the surface as shown in figure 1(a). The top diameter of the fabricated nanostructures is less than 100 nm, although is relatively large compared with recent literature with plasma dry etching approach [18][19][20], still can be considered in the nanoscale. These nanostructures are randomly distributed on the surface and cover approximately 50% of the surface area.…”

Towards tilt-free in plasma etching

“…The high silicon exposure ratio (∼49.8%) in the wafer with silicon cavity guarantees that the gas will not be impeded to entering the cavity microstructure (i.e. shadowing effect can be excluded) [12,17], and the sidewalls of the cavity microstructure facilitate the comparison of the gas flow along the direction of the wafer edge/center. The thickness of the fluorocarbon polymer on the wafer surface coincide with the simulation results of the gas flow velocity (figure 3(b)).…”

“…Plasma etching is a process that matters for microstructures manufacturing in both scientific and industrial communities [1,2], which can be widely applied in various devices (such as microelectromechanical systems (MEMS) [3,4], capacitors [5,6], metal-oxide-semiconductor field effect transistors (MOSFETs) [7,8], and memory devices [9,10]) and device related processes (such as advanced packaging [11,12] and device isolation [13,14]). In detail, MEMS gyroscope based on the Coriolis force principle contains parallel plate capacitor accelerators in two independent directions, and the higher depth/verticality of the silicon microstructure can increase the 4 Contributed equally to this work.…”

“…Furthermore, 3D NAND (Not AND) can expand the storage capacity through vertically stacking of flash memory chips, where the SiO 2 /Si 3 N 4 layers are plasma etched to provide the linkage path for data reading/writing. Similarly, through silicon via (TSV) structures allow the packaging of different devices in a system to maintain Moore's Law [1,11,12]. In addition, the active area needs to be separated to prohibit the connecting between different devices, and plasma etching is required for both deep trench isolation [13] and shallow trench isolation [14].…”

Terahertz Barcodes Enabled by All‐Silicon Metasurfaces for Process Control and Monitoring Applications

“…Fifth, the terahertz reflection responses of the metasurfaces are barely affected by the substrate thickness, broadening the applicability of the barcode to wafers of various thicknesses, and deep etching of more complex material systems such as Silicon‐On‐Insulator (SOI) and Silicon‐On‐Glass (SOG) devices. Sixth, as a crucial specification of the etching process, scallop size [ 38,50 ] in a normal range (<200 nm) exhibits almost no effect on the reflection responses of the designed metasurfaces (Figure S5, Supporting Information) since it is negligible compared to the terahertz wavelength. In addition, the etching process is usually performed at a relatively high vacuum level (tens of mTorr), with little water vapor in the etching chamber.…”