2016
DOI: 10.1109/jdt.2016.2556980
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TFT Compact Modeling

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Cited by 25 publications
(17 citation statements)
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“…For the large variations in OTFT materials and structures, further modeling efforts have been devoted to the capability of rearrangement and flexibility for capturing the essence in the behaviors of various OTFTs in a consistent and relatively simple way, and allowing for easier implementation, modifications, and parameter extraction [128], [136]. These developed models can be conveniently implemented into commercial circuit simulator for circuit simulation using Verilog-A, which, however, is slower and less efficient than a well-developed SPICE model [137]. Currently, the only OTFT SPICE model available in commercial circuit simulator is the universal OTFT (UOTFT) model in SmartSPICE, which combines the robust concepts of universal charge-based FET modeling with OTFT specific charge, mobility and contact resistance bias, and temperature dependence [138].…”
Section: Device Modeling and Circuit Designmentioning
confidence: 99%
“…For the large variations in OTFT materials and structures, further modeling efforts have been devoted to the capability of rearrangement and flexibility for capturing the essence in the behaviors of various OTFTs in a consistent and relatively simple way, and allowing for easier implementation, modifications, and parameter extraction [128], [136]. These developed models can be conveniently implemented into commercial circuit simulator for circuit simulation using Verilog-A, which, however, is slower and less efficient than a well-developed SPICE model [137]. Currently, the only OTFT SPICE model available in commercial circuit simulator is the universal OTFT (UOTFT) model in SmartSPICE, which combines the robust concepts of universal charge-based FET modeling with OTFT specific charge, mobility and contact resistance bias, and temperature dependence [138].…”
Section: Device Modeling and Circuit Designmentioning
confidence: 99%
“…In this study, a simple n‐type load resistive standard ternary inverter (STI) is used as an example of a ternary logic unit. The semi‐empirical model for ZnO TTFT consists of two TFT compact models connected in parallel, and each TFT compact model is expressed by the following Equation (): [ 24 ] IDS=GoWLexp(κ(VGSVFB)α)VDS+Ioff where W and L are the width and the length of the channel, respectively; I off is the off‐current of TFT; V FB is the gate voltage ( V GS ) at which the drain current ( I DS ) starts to increase rapidly; G 0 is a parameter related to the mobility of the TFT, and κ and α are related to the trap states. The three primary fitting parameters are G 0 , κ , and α.…”
Section: Resultsmentioning
confidence: 99%
“…In this study, a simple n-type load resistive standard ternary inverter (STI) is used as an example of a ternary logic unit. The semiempirical model for ZnO TTFT consists of two TFT compact models connected in parallel, and each TFT compact model is expressed by the following Equation (3): [24]…”
Section: Wwwadvelectronicmatdementioning
confidence: 99%
“…where α is the power law coefficient in the TFT model (α = 0 for the case of MOSFET) [55], [185]. As seen in Fig.…”
Section: ) Transconductance and Transconductance Efficiencymentioning
confidence: 99%