Testing Solder Interconnect Reliability Under Drop Impact Loading Conditions

Zaal, J.J.M.; Driel, W.D. van; Hochstenbach, H.P.; Zhang, G.Q.

doi:10.1109/icept.2007.4441528

Cited by 3 publications

(2 citation statements)

References 7 publications

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“…Thus, manufacturers and researchers are trying to develop simpler and cheaper test methods. Those efforts include the 4-point board level dynamic bending (4PDB) tests [3] which were reported to be used by Motorola corporation, the ball impact test (BIT) proposed by Yeh Chang-Lin [4] , and the cold bump pull (CBP) performed by NXP Semiconductors [5] . Compared with JEDEC procedure and the methods mentioned above, the 4-point dynamic bending test needs not so much expensive equipments and is simple.…”

Section: Introductionmentioning

confidence: 99%

High speed deformation measurement of electronic packages by the digital image correlation method

Qin

et al. 2008

SPIE Proceedings

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Section: Introductionmentioning

confidence: 99%

High speed deformation measurement of electronic packages by the digital image correlation method

Qin

et al. 2008

SPIE Proceedings

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“…Both were proposed by the JEDEC and have become more common and increasingly standardized. Accompanying the increasing usage of portable devices and the evaluation of the dynamic performance of electronic products, researchers from various aspects have proposed various experimental techniques and test methods 1–10 . Yeh et al 5,7 applied different material models in drop‐test simulations according to discussed JEDEC testing standards.…”

Section: Introductionmentioning

confidence: 99%

Experiment and Simulation in Design of the Board-Level Drop Testing Tower Apparatus

Chen

et al. 2011

Experimental Techniques

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Solder joint reliability is of great concern to semiconductor and electronic product manufacturers. Due to rapid advancements in the electronic industry, packages with fine pitch ball grid array have been increasingly used in portable electronic devices. The mechanical shock resulting from mishandling during transportation or custom usage may lead to malfunction of product. A Joint Electron Device Engineering Council (JEDEC) standard (JESD22‐B111) for a board‐level drop test of handheld electronic products was released to specify the drop test procedure and conditions in 2003. The purpose of this paper is to design and analyze the performance of a drop test apparatus created in an in‐house laboratory in terms of research basis. The specified impact shock with a sine wave accompanied by peak acceleration and pulse duration is a core requirement. The impact pulse is a complex function of various tester parameters. However, this is a unique characteristic based on the infrastructure design of each drop tester. Once the main frame of the drop tester is established, the drop height, strike surface material, and thickness are the major factors to evaluate the performance of drop tester. Therefore, many time‐consuming experimental trial‐and‐error steps are required to calibrate and characterize a drop tester to achieve the required impact pulse. The most serious conditions B, G and H are achieved, also for condition A, which satisfies the JESD22‐B111 test conditions. To provide design guidelines, the dynamic simulation using finite element model by ANSYS LS‐DYNA code was performed in terms of drop height, strike surface material, and thickness. This study observed that () the peak acceleration and pulse duration are significantly affected by strike surface thickness; () the peak acceleration is strongly affected by strike surface modulus, but less so on the pulse duration; () the drop height affects the peak acceleration, but is insignificant on the pulse duration. The results between experiment and simulation are well correlated at certain levels. An empirical relationship is developed to determine the different design parameters of peak acceleration and pulse duration. In real applications, the designed parameters that can be varied to achieve the desired impact pulse are strike surface modulus and thickness because the drop height is standard.

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A novel procedure for failure criteria determination at solder joints under the board level drop test

Liu

Lin

et al. 2015

Materials Testing

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Controlling and monitoring of dynamic responses are very important to ensure consistent test results and understand mechanical behaviors, as they are closely related to the solder joint failure mechanism. The failure of a solder joint during drop impact is induced by printed circuit board (PCB) bending. The failure criteria must be clear to determine the absolute impact life for direct comparison of drop test results. In this publication, a multi-channel real time electrical monitoring system is introduced, which can measure the dynamic voltage of daisy-chained solder joints in real-time during drop impact. A new failure criteria of board level drop test is developed, which takes the function of the component into account.

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Testing Solder Interconnect Reliability Under Drop Impact Loading Conditions

Cited by 3 publications

References 7 publications

High speed deformation measurement of electronic packages by the digital image correlation method

High speed deformation measurement of electronic packages by the digital image correlation method

Experiment and Simulation in Design of the Board-Level Drop Testing Tower Apparatus

A novel procedure for failure criteria determination at solder joints under the board level drop test

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