2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID) 2018
DOI: 10.1109/vlsid.2018.45
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Test-Time Reduction for Power-Aware 3D-SoC

Sabyasachee Banerjee1,
Subhashis Majumder2,
Bhargab B. Bhattacharya
3
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Cited by 8 publications
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