Test structures for analysis and parameter extraction of secondary photon-induced leakage currents in CMOS DRAM technology

Abstract

A photon-induced leakage current technique to analyze hot carriers is discussed. CMOS photo-leakage test structures are used to determine the spatial dependency of photon-induced leakage current. New trench DRAM test structures are developed for application of the photon-induced leakage technique to analyze hot carriers induced by trench DRAM leakage mechanisms. An analytical model is developed for application of the photonInduced leakage analysis to MOSFET and trench GlDL mechanisms.