Test Methodologies for Power Cycling Experiment

Abstract

When compared to temperature distributions in an actual application, thermal cycling is not a complete representation of the thermal gradients found in functional electronics under power-on condition. This discrepancy is particularly severe in power electronics and it distorts the thermo-mechanical stresses experienced at the joints and interfaces of power devices. Accelerated stress tests for power electronics are therefore better conducted with accelerated power cycling experiments rather than with accelerated thermal cycling, because the power cycles simulate more closely accelerated versions of an application cycle where the junction temperature of the die rises and falls as the power is turned off and on. However, developing a power cycling test setup can be comparatively more challenging than temperature cycling test setup, because of the complex triggering circuitry and logic needed for rapid power cycling, power circuitry needed to supply the large wattage safely to the devices under test, thermal cooling system to remove the high amount of heat generated, and software/hardware to control the test setup to maintain the right operational parameters. In this study, a test setup has been developed to power cycle IGBT and bipolar semiconductor devices for accelerated durability tests. The test setup is described and the role of each hardware and software component in the test setup is elaborated. Sample test results are presented, to illustrate the capabilities of the test setup. This work adds to the state of the art of power cycling experiments and improves our understanding of ways to develop stable power cycling test setups for various kinds of applications.