2015 Euromicro Conference on Digital System Design 2015
DOI: 10.1109/dsd.2015.16
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TEST: Assessing NoC Policies Facing Aging and Leakage Power

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Cited by 2 publications
(1 citation statement)
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“…Power gating has been extensively explored within the context of NoCs, in order to reduce the leakage power [16,7], to improve the reliability of some part of the architecture [21,22], or both [20]. We categorize the power-gating techniques based on their operational granularity, i.e., either at the router-level (entire router switched off), or at the buffer-level (only individual buffers are switched off).…”
Section: Related Workmentioning
confidence: 99%
“…Power gating has been extensively explored within the context of NoCs, in order to reduce the leakage power [16,7], to improve the reliability of some part of the architecture [21,22], or both [20]. We categorize the power-gating techniques based on their operational granularity, i.e., either at the router-level (entire router switched off), or at the buffer-level (only individual buffers are switched off).…”
Section: Related Workmentioning
confidence: 99%