TEST: Assessing NoC Policies Facing Aging and Leakage Power

BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers

“…Power gating has been extensively explored within the context of NoCs, in order to reduce the leakage power [16,7], to improve the reliability of some part of the architecture [21,22], or both [20]. We categorize the power-gating techniques based on their operational granularity, i.e., either at the router-level (entire router switched off), or at the buffer-level (only individual buffers are switched off).…”