2010
DOI: 10.1088/0268-1242/25/9/095011
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Terascale integration via a redesign of the crossbar based on a vertical arrangement of poly-Si nanowires

Abstract: The race of integrated-circuit technology toward high bit density has already brought to transistor densities of the order of 10 9 cm −2 , yet keeping conventional circuit layouts. Crossbar structures are widely believed to meet the requirements of high bit density along with sustainable interconnection complexity avoiding the dramatic cost increase of the manufacturing facilities required by advanced lithography. In this work we demonstrate the possibility of producing poly-Si nanowires preserving bulk electr… Show more

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Cited by 13 publications
(10 citation statements)
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References 29 publications
(44 reference statements)
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“…This paper is a follow-up of a previous one published in this journal [6]; with respect to it, while confirming the reproducibility of the process in three consecutive successful runs, here we (a) provide a detailed electrical characterization of the bottom wire array, (b) demonstrate the scalability of the process to horizontal separations between NWs on the deep-submicrometre length scale, and (c) discuss in detail the ultimate density limit determining the best deposition conditions. Still unanswered remains the question of the demultiplexing the vertical NW arrays.…”
Section: Introductionmentioning
confidence: 75%
See 1 more Smart Citation
“…This paper is a follow-up of a previous one published in this journal [6]; with respect to it, while confirming the reproducibility of the process in three consecutive successful runs, here we (a) provide a detailed electrical characterization of the bottom wire array, (b) demonstrate the scalability of the process to horizontal separations between NWs on the deep-submicrometre length scale, and (c) discuss in detail the ultimate density limit determining the best deposition conditions. Still unanswered remains the question of the demultiplexing the vertical NW arrays.…”
Section: Introductionmentioning
confidence: 75%
“…Poly-Si NWs can be arranged in vertical arrays with pitch around 50 nm via controlled etching and filling of the recessed regions (CEFRR) unavoidably resulting from conventional IC processing [23] and the vertical arrays can be arranged in the plane via lithographic methods. The CEFRR technique was proposed in [6] and is sketched in figure 1. Let N denote the number of equivalent bilayers forming the multilayered film.…”
Section: Vertical Organization Of the Nw Arraymentioning
confidence: 99%
“…Therefore, it is of great importance to develop versatile 3D fabrication techniques that are able to form 3D architectures using parallel wafer-scale microand nanomachining. Cerofolini et al 4,5 reported the realization of repeated structures on top of a Si wafer. However, this technique requires the deposition of as many alternating layers as the number of repetitions required.…”
Section: Introductionmentioning
confidence: 99%
“…Vertically-oriented nanowires (nanopillars) have proven to be relevant to applications ranging from energy conversion [1][2][3][4][5][6] to biosensing [7,8] and optoelectronics [9]. Their production however still involves techniques such as nanopositioning [10], deep-UV and electron lithography [11], or multispace patterning [12,13] that are not applicable to the production of nanopillar arrays over large areas. Metal-assisted chemical etching (MACE) is instead a high-throughput technique, and at the same time it is one of the few techniques enabling growth of vertical 1D structures of virtually unlimited length.…”
Section: Introductionmentioning
confidence: 99%