Terabit sampling system with photonic time-stretch analog-to-digital converter

Abstract

The detection of rapid dynamics in diverse physical systems is traditionally very difficult and strongly dominated by several noise contributions. Laser mode-locking, electron bunches in accelerators and optical-triggered phases in materials are events that carry important information about the system from which they emerge. To understand the underlying dynamics of complex systems often large numbers of single-shot measurements must be acquired continuously over a long time with extremely high temporal resolution. Ultrafast real-time instruments allow the acquisition of large data sets, even for rare events, in a relatively short time period. The real-time measurement of fast single-shot events with large record lengths is one of the most challenging problems in the fields of instrumentation and measurement. In this contribution, the novel ultra-fast and continuous data sampling system THERESA using photonic time-stretch is presented and its performance is discussed. The proposed data acquisition system is based on the latest ZYNQ Radio Frequency System on Chip (ZYNQ-RF SoC) family from Xilinx, which combines an array of fast (GS/s) multi-channel Analog-to-Digital Converters (ADCs) with a Field Programmable Gate Array (FPGA) and a multi-core ARM processor in a single heterogeneous programmable device. The stretched pulse is sampled in parallel by 16 wideband sampling channels operating in time-interleaving mode. The sampled data is transferred by a 100 Gb Ethernet data link to the Data Acquisition (DAQ) compute node for further analysis. The combination of both, the photonic time-stretch and the fast sampling system, is capable of sampling short pulses with femtosecond time resolution. Applications of the new system, hardware implementation and the commissioning of the first system for the electron bunch diagnostics are presented.

Advanced diagnostic detectors for rogue phenomena, single-shot applications

“…A comprehensive description of THERESA and its components including the data acquisition and firmware architecture has been reported in. 61 A preliminary characterization of the first digitizer demonstrator was performed with a periodical pulse train with an amplitude of 1 V and a pulse rate of 125 MHz. The clock of the sampling channels was set to 1 GHz such that one sample of the fast-pulse was followed by 7 samples of the baseline.…”