Terabit encryption in a second: Performance evaluation of block ciphers in GPU with Kepler, Maxwell, and Pascal architectures

Lee, Wai-Kong; Goi, Bok‐Min; Phan, Raphaël C.‐W.

doi:10.1002/cpe.5048

Cited by 13 publications

(9 citation statements)

References 28 publications

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“…For instance, breakthrough performance is reported by An et al 2 for some lightweight Add‐Rotate‐XOR based ciphers like HIGHT, LEA, and CHAM. Encryption at terabit per second level for LEA, SIMON, Chaskey, SIMECK, and SPECK on GPUs is reported by Lee et al 3 …”

Section: Introductionmentioning

confidence: 94%

“…For instance, breakthrough performance is reported by An et al 2 for some lightweight Add-Rotate-XOR based ciphers like HIGHT, LEA, and CHAM. Encryption at terabit per second level for LEA, SIMON, Chaskey, SIMECK, and SPECK on GPUs is reported by Lee et al 3 Many CUDA optimizations are provided in the literature for the Advanced Encryption Standard (AES), 4 which is arguably the most used encryption algorithm. One of the most recent of these by An and Seo 5 provided highly efficient CUDA implementation of AES on GPUs to cope with massive amounts of data using an optimized table based implementation.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

GPU accelerated 3DES encryption

Altınok

Peker

Tezcan

et al. 2021

Concurrency and Computation

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Triple DES (3DES) is a NIST and ISO/IEC standard block cipher that is also used in some web browsers and several electronic payment applications. We propose an optimized bit‐level parallelization of 3DES for GPU accelerated encryption to allow processing high volumes of data. Since the block size of 3DES is 64 bits, our approach considers a kernel block as a 64‐bit 3DES block. Each kernel block performs XOR, permutation, and S‐box operations of this cipher in parallel and memory accesses are optimized by the use of constant and shared memory. Although table based and bitsliced implementations of block ciphers on GPUs outperform naive implementations, their performance vary significantly on different GPU models and architectures. Lack of publicly available source codes prohibit a fair comparison of the performance results for different implementations. In this work, we provide performance results on various GPU models and make our implementation publicly available for reproducibility and further comparisons. When compared against the baseline multi‐threaded CPU implementation, our optimization achieves an average of 15.95× speed‐up when encrypting large files using an RTX 2070 Super GPU. Moreover, when modified into a key search attack, more than 94.4 million 3DES key searches per second can be conducted on an RTX 2070 Super GPU.

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Section: Introductionmentioning

confidence: 94%

Section: Introductionmentioning

confidence: 99%

GPU accelerated 3DES encryption

Altınok

Peker

Tezcan

et al. 2021

Concurrency and Computation

View full text Add to dashboard Cite

show abstract

“…Researches that optimize the AES encryption process on GPUs have still being studied. Recently, various optimization methods and results of AES using GPUs have been presented in [4], [5] and [6].…”

Section: Related Workmentioning

confidence: 99%

Designing a New XTS-AES Parallel Optimization Implementation Technique for Fast File Encryption

Seo

2022

IEEE Access

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XTS-AES is a disk encryption mode of operation that uses the block cipher AES. Several studies have been conducted to improve the encryption speed using XTS-AES according to the increasing disk size. Among them, there are researches on parallel encryption of XTS-AES using GPU. Although these studies focus on parallel encryption of AES, optimization for the entire XTS mode has not been performed. The reason is that the α j computation process included in XTS mode is not suitable for parallel operation. Therefore, in this paper, we proposed several techniques for high-speed encryption in GPU by modifying XTS-AES into a form that is advantageous for parallel operation. The core idea is to pre-calculate the α j calculation on the CPU into a form that is easy to operate on the GPU. To achieve this goal, we analyzed the α j calculation process and present the parts that can be optimized. First, we presented a method that can replace multiple operations with a single table reference through the analyzed α j computation progress. Thereafter, we proposed a method that can be calculated by partially skipping the entire α j computation process that must be sequentially calculated through the table reference technique. For the proposed optimization implementation, we presented various results for evaluating the optimal implementation. In addition, we compared the performance of XTS-AES OpenSSL implementation on CPU and our proposed optimization implementation on GPU.

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“…In JKIISC'2015, an LEA optimization study using GPU shared memory was conducted [12]. In [13], the excellent performance improvement was achieved through coarse-grained optimization using thread warp. By utilizing the characteristics of warp actively, terabit throughput was proposed for various block ciphers.…”

Section: Related Workmentioning

confidence: 99%

Parallel Implementations of ARX-Based Block Ciphers on Graphic Processing Units

Kim

Kwon

et al. 2020

Mathematics

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With the development of information and communication technology, various types of Internet of Things (IoT) devices have widely been used for convenient services. Many users with their IoT devices request various services to servers. Thus, the amount of users’ personal information that servers need to protect has dramatically increased. To quickly and safely protect users’ personal information, it is necessary to optimize the speed of the encryption process. Since it is difficult to provide the basic services of the server while encrypting a large amount of data in the existing CPU, several parallel optimization methods using Graphics Processing Units (GPUs) have been considered. In this paper, we propose several optimization techniques using GPU for efficient implementation of lightweight block cipher algorithms on the server-side. As the target algorithm, we select high security and light weight (HIGHT), Lightweight Encryption Algorithm (LEA), and revised CHAM, which are Add-Rotate-Xor (ARX)-based block ciphers, because they are used widely on IoT devices. We utilize the features of the counter (CTR) operation mode to reduce unnecessary memory copying and operations in the GPU environment. Besides, we optimize the memory usage by making full use of GPU’s on-chip memory such as registers and shared memory and implement the core function of each target algorithm with inline PTX assembly codes for maximizing the performance. With the application of our optimization methods and handcrafted PTX codes, we achieve excellent encryption throughput of 468, 2593, and 3063 Gbps for HIGHT, LEA, and revised CHAM on RTX 2070 NVIDIA GPU, respectively. In addition, we present optimized implementations of Counter Mode Based Deterministic Random Bit Generator (CTR_DRBG), which is one of the widely used deterministic random bit generators to provide a large amount of random data to the connected IoT devices. We apply several optimization techniques for maximizing the performance of CTR_DRBG, and we achieve 52.2, 24.8, and 34.2 times of performance improvement compared with CTR_DRBG implementation on CPU-side when HIGHT-64/128, LEA-128/128, and CHAM-128/128 are used as underlying block cipher algorithm of CTR_DRBG, respectively.

show abstract

Terabit encryption in a second: Performance evaluation of block ciphers in GPU with Kepler, Maxwell, and Pascal architectures

Cited by 13 publications

References 28 publications

GPU accelerated 3DES encryption

GPU accelerated 3DES encryption

Designing a New XTS-AES Parallel Optimization Implementation Technique for Fast File Encryption

Parallel Implementations of ARX-Based Block Ciphers on Graphic Processing Units

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