Template-based PDN Synthesis in Floorplan and Placement Using Classifier and CNN Techniques

Chhabria, Vidya A.; Kahng, Andrew B.; Kim, Min‐Soo; Mallappa, Uday; Sapatnekar, Sachin S.; Xu, Bo

doi:10.1109/asp-dac47756.2020.9045303

Cited by 27 publications

(7 citation statements)

References 13 publications

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“…(i) A PDN density map: This feature is generated by extracting the average PDN pitch in each region of the chip. For example, when used in conjunction with the PDN styles in [8,35], where the chip uses regionwise uniform PDNs, the average PDN density in each region, across all metal layers, is provided as an input (Fig. 2(e)).…”

Section: Static and Transient Ir Drop Analysismentioning

confidence: 99%

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Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks

Chhabria¹,

Ahuja²,

Prabhu³

et al. 2021

Preprint

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Power delivery network (PDN) analysis and thermal analysis are computationally expensive tasks that are essential for successful IC design. Algorithmically, both these analyses have similar computational structure and complexity as they involve the solution to a partial differential equation of the same form. This paper converts these analyses into image-to-image and sequence-to-sequence translation tasks, which allows leveraging a class of machine learning models with an encoder-decoder-based generative (EDGe) architecture to address the time-intensive nature of these tasks. For PDN analysis, we propose two networks: (i) IREDGe: a full-chip static and dynamic IR drop predictor and (ii) EMEDGe: electromigration (EM) hotspot classifier based on input power, power grid distribution, and power pad distribution patterns. For thermal analysis, we propose ThermEDGe, a full-chip static and dynamic temperature estimator based on input power distribution patterns for thermal analysis. These networks are transferable across designs synthesized within the same technology and packing solution. The networks predict on-chip IR drop, EM hotspot locations, and temperature in milliseconds with negligibly small errors against commercial tools requiring several hours.

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Section: Static and Transient Ir Drop Analysismentioning

confidence: 99%

“…We synthesize irregular PDNs of varying densities for each dataset element using PDN templates, as defined by OpeNPDN [8]. These templates are a set of PDN building blocks, spanning multiple metal layers in a 12nm commercial FinFET technology, which vary in metal utilization.…”

Section: Ir Drop Analysismentioning

confidence: 99%

Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks

Chhabria¹,

Ahuja²,

Prabhu³

et al. 2021

Preprint

Self Cite

View full text Add to dashboard Cite

show abstract

“…The circuits are taken through synthesis, placement and routing in these technology nodes (some circuits are implemented in both nodes) using a standard design flow. The power grid is synthesized using an open-source tool, OpeNPDN [25] from OpenROAD.…”

Section: Analysis On Openroad Power Gridsmentioning

confidence: 99%

A New, Computationally Efficient "Blech Criterion" for Immortality in General Interconnects

Shohel¹,

Chhabria²,

Sapatnekar³

2021

Preprint

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Traditional methodologies for analyzing electromigration (EM) in VLSI circuits first filter immortal wires using Blech's criterion, and then perform detailed EM analysis on the remaining wires. However, Blech's criterion was designed for two-terminal wires and does not extend to general structures. This paper demonstrates a first-principles-based solution technique for determining the steady-state stress at all the nodes of a general interconnect structure, and develops an immortality test whose complexity is linear in the number of edges of an interconnect structure. The proposed model is applied to a variety of structures. The method is shown to match well with results from numerical solvers, to be scalable to large structures.

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“…However, in addition to the 2-D power distributions, IREDGe has two other inputs: (i) A PDN density map: This feature is generated by extracting the average PDN pitch in each region of the chip. For example, when used in conjunction with the PDN styles in [15], [16], where the chip uses regionwise uniform PDNs, the average PDN density in each region, across all metal layers, is provided as an input (Fig. 2(e)).…”

Section: A Problem Formulations and Data Representationmentioning

confidence: 99%

Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks

Chhabria¹,

Ahuja²,

Prabhu³

et al. 2020

Preprint

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Computationally expensive temperature and power grid analyses are required during the design cycle to guide IC design. This paper employs encoder-decoder based generative (EDGe) networks to map these analyses to fast and accurate image-to-image and sequence-tosequence translation tasks. The network takes a power map as input and outputs the corresponding temperature or IR drop map. We propose two networks: (i) ThermEDGe: a static and dynamic full-chip temperature estimator and (ii) IREDGe: a full-chip static IR drop predictor based on input power, power grid distribution, and power pad distribution patterns. The models are design-independent and must be trained just once for a particular technology and packaging solution. ThermEDGe and IREDGe are demonstrated to rapidly predict on-chip temperature and IR drop contours in milliseconds (in contrast with commercial tools that require several hours or more) and provide an average error of 0.6% and 0.008% respectively.

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Template-based PDN Synthesis in Floorplan and Placement Using Classifier and CNN Techniques

Cited by 27 publications

References 13 publications

Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks

Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks

A New, Computationally Efficient "Blech Criterion" for Immortality in General Interconnects

Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks

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