Temperature sensors placement strategy for fault diagnosis in integrated circuits

Bratek, Piotr; Kos, Andrzej

doi:10.1109/stherm.2001.915185

Cited by 7 publications

(2 citation statements)

References 4 publications

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“…On a different track, Bratek and Kos [2001] present sensor placement for fault diagnosis of integrated circuits, by linking temperature sensors and power modules in pairs. Lopez-Buedo et al [2002] investigated instantiating digital sensors on field-programmable gate arrays (FPGAs).…”

Section: Related Workmentioning

confidence: 99%

Thermal monitoring mechanisms for chip multiprocessors

Long

Memik

Mukherjee

2008

ACM Trans. Archit. Code Optim.

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With large-scale integration and increasing power densities, thermal management has become an important tool to maintain performance and reliability in modern process technologies. In the core of dynamic thermal management schemes lies accurate reading of on-die temperatures. Therefore, careful planning and embedding of thermal monitoring mechanisms into high-performance systems becomes crucial. In this paper, we propose three techniques to create sensor infrastructures for monitoring the maximum temperature on a multicore system. Initially, we extend a nonuniform sensor placement methodology proposed in the literature to handle chip multiprocessors (CMPs) and show its limitations. We then analyze a grid-based approach where the sensors are placed on a static grid covering each core and show that the sensor readings can differ from the actual maximum core temperature by as much as 12.6 • C when using 16 sensors per core. Also, as large as 10.6% of the thermal emergencies are not captured using the same number of sensors. Based on this observation, we first develop an interpolation scheme, which estimates the maximum core temperature through interpolation of the readings collected at the static grid points. We show that the interpolation scheme improves the measurement accuracy and emergency coverage compared to grid-based placement when using the same number of sensors. Second, we present a dynamic scheme where only a subset of the sensor readings is collected to predict the maximum temperature of each core. Our results indicate that, we can reduce the number of active sensors by as much as 50%, while maintaining similar measurement accuracy and emergency coverage compared to the case where the entire sensor set on the grid is sampled at all times.

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Section: Related Workmentioning

confidence: 99%

Thermal monitoring mechanisms for chip multiprocessors

Long

Memik

Mukherjee

2008

ACM Trans. Archit. Code Optim.

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“…In this regard, our work is the first attempt to address this opportunity. On a different track, Bratek et al [15] present sensor placement for fault diagnosis of integrated circuits, by linking temperature sensors and power modules in pairs. In various other fields the problem of "sensor placement" has been studied.…”

Section: Related Workmentioning

confidence: 99%

Systematic temperature sensor allocation and placement for microprocessors

Mukherjee

Memik

2006

2006 43rd ACM/IEEE Design Automation Conference

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Thermal monitoring using on-die thermal sensors provides the means Modem high performance processors employ advanced techniques to assess the run-time thermal profile of a system. Thermal for thermal management, which rely on accurate readings of on-die monitoring is already in use in modem processor architectures to thermal sensors. As the importance of thermal effects on reliability assist Dynamic Thermal Management (DTM) mechanisms. For and performance of integrated circuits increases careful planning and instance, Intel Pentium 4, Pentium M and IBM PowerPC processors embedding of thermal monitoring mechanisms into these systems are equipped with thermal sensors that trigger alerts if the junction will be crucial. Systematic tools for analysis of thermal behavior and temperature exceeds a specified limit. Based on these alerts the determination of best allocation and placement of thermal sensing processor power consumption is regulated via clock throttling [6]. elements is therefore a highly relevant problem. In this paper, we POWER5, IBM's next generation POWER microprocessor employs propose novel optimization techniques for determining the optimal 24 digital temperature sensors [7]. In this paper, we propose a tool locations and allocations for thermal sensors to provide a high fidelity that helps the designer to determine the best allocation and placement thermal profile of a complex microprocessor system. Our algorithm of thermal sensors in a complex microprocessor system. In the identifies an optimal physical location for each sensor such that the following, we will first elaborate on the need for optimization in this sensor's the attraction towards steep thermal gradient is maximized. problem.We also present a hybrid allocation and placement strategy showing The thermal behavior of complex systems is affected by various the trade-offs associated with number of sensors used and expected factors. For example localized heating on a processor is application accuracy. Our results show that our tool is able to create a sensor dependent. Moreover, different architectural choices may result in distribution for a given microprocessor architecture providing thermal diverse thermal profiles. Also, the specific purpose of monitoring will measurements with maximum error of 3.1 8°C and average maximum determine what specific form of sensing setup should be used. For error of 1.63°C across a wide set of applications. instance, if we are primarily interested in worst case operating temperatures and design of emergency intervention mechanisms, then Categories and Subject Descriptors: J.6 [Computer Applications]: the spots that reach the highest temperatures on the processor are Computer-aided Engineering (CAD): B.8.2 [Hardware]: most relevant. On the other hand, if we are interested in controlling Performance and Reliability -Performance Analysis and Design temperature dependent leakage power and developing dynamic Aids. mechanisms to manipulate the configuration of certain components, then we might need to capture the t...

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A method of thermal testing of microsystems

Bratek

Kos

2001

Microelectronics Reliability

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Temperature sensors placement strategy for fault diagnosis in integrated circuits

Cited by 7 publications

References 4 publications

Thermal monitoring mechanisms for chip multiprocessors

Thermal monitoring mechanisms for chip multiprocessors

Systematic temperature sensor allocation and placement for microprocessors

A method of thermal testing of microsystems

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