Abstract:The failure mechanisms caused by electrostatic discharge (ESD) effects
at ambient temperatures ranging from -75℃ to 125℃ are investigated by
Silvaco TCAD simulator. The devices are NMOS transistors fabricated with
28nm fully depleted silicon-on-insulator (FDSOI) technology. Results
indicate that with an increase in temperature, the first breakdown
voltage of the device decreased by 27.32%, while the holding voltage
decreased by approximately 8.49%. The total current density, lattice
temperature, and potential … Show more
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