In Cu 2 ZnSnS 4 (CZTS) photovoltaic cells, a low open-circuit voltage (V OC ) principally causes low conversion efficiency. We investigated the deposition of a CZTS layer by a two-layer process to improve the V OC of the CZTS cells. In this process, the first CZTS layers near a Mo electrode have a high Cu content and the second layer near the surface has a low Cu content. The two-layer process improved the V OC of the CZTS cells from 0.66 to 0.78 V. Finally, the best CZTS cell showed a conversion efficiency of 8.8%. R ecently, the production of compound thin-film photovoltaic cells, for example, the Cu(In,Ga)Se 2 and CdTe types, has been increasing annually. However, the materials used to make these cells include rare metals (In and Ga), which significantly limits the volume that can be produced. The thin-film photovoltaic material Cu 2 ZnSnS x Se 4−x (CZTSSe) has recently become a candidate material for new photovoltaic cells. Wang et al. recently reported the production of CZTS 0.2 Se 0.8 thin-film solar cells with a conversion efficiency of 12.6%. 2) However, CZTSSe contains Se, a harmful element, and has a band-gap energy (E g ) of 1.1 eV, which is smaller than the optimum E g of 1.4-1.5 eV for the solar spectrum. On the other hand, Cu 2 ZnSnS 4 (CZTS) has been attracting increasing attention as a candidate material 1) because it contains no rare (In and Ga) or harmful (Se and Te) elements, and has a suitable E g of 1.4 eV. However, the CZTS cells that were previously reported have efficiencies below 10%. [3][4][5][6] Consequently, for the mass production of photovoltaic cells, it is clear that the development of CZTS cells with high efficiency is required.One of the main reasons for the poor photovoltaic properties of CZTS cells is their open-circuit voltage (V OC ), which is lower than that expected from the E g . The low V OC directly results in low conversion efficiency. To understand the V OC of the CZTS cells, the conduction band offset (CBO) at the interface between the buffer and the CZTS layers should be examined. In general, the interface between the buffer layer and the absorber layer is categorized into either a "cliff " or a "spike" type, where a large cliff lowers V OC and a large spike reduces the short-circuit current density (J SC ). 7,8) Researchers previously reported on the evaluation of the CBO value at the interface between the CdS and CZTS layers using methods such as hard X-ray photoelectron spectroscopy, 9) pump=probe methods [ultraviolet photoelectron spectroscopy (UPS)], 10) and UPS=inverse photoelectron spectroscopy (IPES), 11) and showed it to be sufficiently small, in the range from +0.4 to −0.2 eV, to realize a high-performance cell. Therefore, the CBO value is not the main reason for the low V OC in the CZTS cells.Another possible reason for the low V OC is the influence of an inner potential between the CZTS and window layers. In other words, the lower inner potential between the CZTS and window layers can cause a lower V OC when the hole carrier concentration (N c ) of the CZ...