2021
DOI: 10.1021/acsami.0c18767
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Tellurium Nanowire Gate-All-Around MOSFETs for Sub-5 nm Applications

Abstract: The nanowire (NW) and gate-all-around (GAA) technologies are regarded as the ultimate solutions to sustain Moore’s law benefitting from the exceptional gate control ability. Herein, we conduct a comprehensive ab initio quantum transportation calculation at different diameters (single trigonal-tellurium NW (1Te) and three trigonal-tellrium NW (3Te)) sub-5 nm tellurium (Te) GAA NW metal–oxide-semiconductor field-effect transistors (MOSFETs). The results claim that the performance of 1Te FETs is superior to that … Show more

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Cited by 38 publications
(30 citation statements)
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References 58 publications
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“…SS can further be represented as (1 + C it /C i ) × 60 mV/decade, where C it and C i are the capacitances caused by the trap states at the interface and that between the channel and gate dielectric per unit area, respectively. Typically, for metal oxide semiconductor transistors, the SS is almost greater than 60 mV/decade, 39,40 which restricts the supply voltage to over 0.5 V. 38 Under the backward sweeping with forward bias of 0.1 V, the SS is obtained as 49 mV/decade (Figure 3c). This sub-60 mV/decade SS can also be achieved via Dirac source FETs, negative capacitance FETs, and tunnelling FETs.…”
Section: Resultsmentioning
confidence: 99%
“…SS can further be represented as (1 + C it /C i ) × 60 mV/decade, where C it and C i are the capacitances caused by the trap states at the interface and that between the channel and gate dielectric per unit area, respectively. Typically, for metal oxide semiconductor transistors, the SS is almost greater than 60 mV/decade, 39,40 which restricts the supply voltage to over 0.5 V. 38 Under the backward sweeping with forward bias of 0.1 V, the SS is obtained as 49 mV/decade (Figure 3c). This sub-60 mV/decade SS can also be achieved via Dirac source FETs, negative capacitance FETs, and tunnelling FETs.…”
Section: Resultsmentioning
confidence: 99%
“…We also used localized-basis DFT together with a nonequilibrium Green function (NEGF) to calculate the electronic structures and transport properties of the Ga 2 O 3 MOSFETs as we did previously. , (See also the Supporting Information for calculation details.) As shown in Figure a, the log–linear plot of the drain-source current ( I DS ) against the gate-source voltage ( V GS ) reveals the effect of the NO adsorption with respect to the pristine monolayer.…”
mentioning
confidence: 99%
“…by applying a magnetic field along the NW axis and thereby opening up a gap in the spectrum, or electrically by controlling the RSOC through gate voltages. In particular, the tremendous improvement in gating techniques enables one to achieve a high control of the RSOC [28][29][30][31][32][33] .…”
Section: Introductionmentioning
confidence: 99%