Technology of integrated self-aligned E/D-mode n⁺⁺GaN/InAlN/AlN/GaN MOS HEMTs for mixed-signal electronics

Abstract

We describe the technology and performance of integrated enhancement/depletion (E/D)-mode n ++ GaN/InAlN/AlN/GaN HEMTs with a self-aligned metal-oxide-semiconductor (MOS) gate structure. An identical starting epi-structure was used for both types of devices without the additional need for a contacts regrowth. The n ++ GaN cap layer was etched away in the gate trenches of the E-mode HEMT while it was left intact for the D-mode HEMT. The plasma etching process was shown to be highly selective between the cap and the InAlN barrier and also to polish the InAlN surface. However, different GaN etching initiation times inside and outside the mesa region were obtained. Gate contacts were isolated using a dielectric layer deposited at low temperature through an e-beam resist to retain the self-aligned approach. Feasibility of the approach for future fast GaN-based mixed-signal electronic circuits was shown by obtaining alternative HEMT threshold voltage values of +0.8 V and −2.6 V, invariant maximal output current of ∼0.35 A mm −1 despite large source-to-drain distances and by demonstrating a functional logic invertor.

Polarization‐Engineered n+GaN/InGaN/AlGaN/GaN Normally‐Off MOS HEMTs

“…In Figure , we show that our ICP RIE process continued monotonously through the epi‐stack, that is our structure does not provide selective etching as reported for the n + GaN/In 17 Al 0.83 N structure . This was presumably because of lower content of Al in the AlGaN barrier if compared with InAlN.…”

“…Subsequently, the same photoresist mask as for the etching was applied also by depositing a 10 or 30‐nm thick Al 2 O 3 in an atomic‐layer deposition (ALD) system using trimethylaluminium and water at 100 °C. Ni/Au metal together with the oxide was lifted‐off to form the self‐aligned MOS gates . Alternatively, sample B was processed also as a Schottky barrier (SB) HEMT omitting ALD of Al 2 O 3 .…”

“…Increase of a positive threshold voltage ( V T ) in GaN‐based transistors is needed for a safe operation of high‐performance switches and logic circuits . Several methods were successfully applied to manipulate V T in true high‐electron mobility transistors (HEMTs) without removing a quantum well (QW) high‐mobility channel.…”

Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs

“…For processing of D-HEMT, the gate recessing is skipped. 22,23 Figure 3(b) shows the layout of the monolithic integration of D-and E-mode HEMTs as NAND and NOR logic cells.…”

AlGaN-Based 1.55 µm Phototransistor as a Crucial Building Block for Optical Computers

“…Thanks to the advent of the InGaN-based blue laser diode, the topic of nitride-based semiconductor alloys has again gained considerable momentum [5][6][7][8][9]. Since semiconductor laser diodes allowed-from 1962 onward-the generation of high-frequency modulated optical signals [10], a robust and ultra-fast phototransistor working at the optical telecommunication wavelength of 1.55 µm would constitute a major breakthrough. In this paper, we, therefore, present the design and simulation of a GaN/AlN-based, rugged and fast phototransistor with a 1.55 µm inter-subband detector acting on the transistor gate.…”