Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs

Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs

“…The state partitioning is performed by adapting the linear partitioning approach described in [3]. The constraint that each lump-FSM state is assigned to exactly one sub-FSM is retained.…”

“…The constraint that each lump-FSM state is assigned to exactly one sub-FSM is retained. However, the constraint that every input must be available to every sub-FSM [3], is relaxed. Instead, our approach introduces two types of messages which may be passed between sub-FSMs.…”

“…In VLSI architectures, FSM decomposition is useful for a number of reasons. By controlling the topology and manner in which the machine is decomposed, it is possible to aim for an implementation with characteristics such as: high speed, as decomposition can usually lead to a reduction in logic depth [2]; low area, as state-encoding heuristics will often cope more efficiently with each of the smaller sub-FSMs than with the large lump-FSM [3]; reduction in interconnect complexity [4], and I/O minimization [5].…”

“…Feske et al [3], have developed an approach to FSM decomposition which operates at the State Transition Graph level. Decomposition strategies that partition the STG allow a wider solution space to be searched by the following phases of synthesis [2].…”

“…The sub-FSMs pass messages to each other when a transition occurs which would cross a sub-STG boundary, indicating which state to enter. Unlike most techniques for FSM decomposition, [3] not only allows an arbitrary number of sub-FSMs to be formed, but decides on that number itself. The simplicity of the messages passed means that complex don't care conditions, arising from the association of particular inputs with particular groups of states, are not exploited.…”