1995
DOI: 10.1109/74.475869
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Techniques for implementation of the FDTD method on a CM-5 parallel computer

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Cited by 26 publications
(17 citation statements)
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“…However, the model is limited in size due to the simulation time and amount of memory required to simulate larger devices. Methods to ease the requirements of three-dimensional models include use of Graphics Processing Units (GPU), parallel processing, and mode simplifications [21][22][23]. Since threedimensional model parameters scale in simulation time like N4 and in memory like N3, the two-dimensional FDTD is used in this paper to simulate this model to avoid unnecessary complications [24].…”
Section: Simulation Modelmentioning
confidence: 99%
“…However, the model is limited in size due to the simulation time and amount of memory required to simulate larger devices. Methods to ease the requirements of three-dimensional models include use of Graphics Processing Units (GPU), parallel processing, and mode simplifications [21][22][23]. Since threedimensional model parameters scale in simulation time like N4 and in memory like N3, the two-dimensional FDTD is used in this paper to simulate this model to avoid unnecessary complications [24].…”
Section: Simulation Modelmentioning
confidence: 99%
“…Liu et al [8] parallelize the core FDTD on a CM-5 (32 processors) parallel computer, with a performance gain of 113 seconds for a domain of 96×86×102 in 1500 time steps over nearly 189 minutes by the sequential version. Guiffaut et al [5] implement a parallel FDTD on a computational domain of 150 × 150 × 50 cells on Cray T3E.…”
Section: Introductionmentioning
confidence: 99%
“…FDTD(Finite Difference Time Domain) (1) (2) FDTD Maxwell Green (3) (4) , 2 4 FDTD (5) ADI FDTD (6) HP-735 8 10Base-T WS (8) Cray T3E HITACHI SR8000 (9) (11) (1) …”
mentioning
confidence: 99%